M5M564R16DJ Просмотр технического описания (PDF) - MITSUBISHI ELECTRIC
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M5M564R16DJ Datasheet PDF : 7 Pages
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MITSUBISHI LSIs
M5M564R16DJ,TP-10,-12,-15
1048576-BIT (65536-WORD BY 16-BIT) CMOS STATIC RAM
Read cycle 4 (Note 6)
VIH
UB,LB
VIL
t CR
ta(B)
(Note 4)
tdis(B)
(Note 4) ten(B)
DQ1~16 VOH
VOL
W=H OE=L
S=L
UNKNOWN
DATA VALID
Note 6. Addresses , S and OE valid prior to LB,UB transition low by (ta(A)-ta(B)), (ta(S)-ta(B)), (ta(OE)-ta(B)).
Write cycle (W control mode)
A 0~15
S
VIH
VIL
VIH
VIL
(Note 7)
OE
VIH
VIL
t CW
tsu(S)
tsu(A-WH)
tsu(A)
tw(W)
trec(W)
(Note 7)
W
LB,UB
VIH
VIL
VIH
VIL
(Note 7)
tsu(B)
(Note 7)
DQ1~16
VIH
VIL
(Input Data)
DQ1~16
VOH
(Output Data)
VOL
tdis(OE)
tsu(D) th(D)
DATA STABLE
tdis(W) (Note 4)
ten(OE) (Note 4)
ten(W)
Hi-Z
Note 7: Hatching indicates the state is don't care.
8: When the falling edge of W is simultaneous or prior to the falling edge of S, the output is maintained in the high impedance.
9: ten,tdis are periodically sampled and are not 100% tested.
MITSUBISHI
ELECTRIC
6
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