CXP87500 Просмотр технического описания (PDF) - Sony Semiconductor
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производитель
CXP87500 Datasheet PDF : 8 Pages
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Pin Assignment in Piggyback Mode (QFP package)
CXP87500
PB5/PPO5
PB4/PPO4
PB3/PPO3
PB2/PPO2
PB1/PPO1
PB0/PPO0
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
PI7
PI6
PI5
PI4
PI3
PI2
PI1
PI0
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81
1
80
2
79
3
78
4
77
5
76
6
75
7
74
8
73
9
72
10
71
4 3 2 1 32 31 30
11
A6
5
29
A8
70
12
A5
6
69
28
A9
13
A4
7
68
27
A11
14
A3
8
15
A2
9
16
A1
10
26
NC
67
66
25
OE
24
A10
65
17
A0
11
23
CE
64
18
NC
12
22
D7
63
19
D0
13
62
21
D6
20
14 15 16 17 18 19 20
61
21
60
22
59
23
58
24
57
25
56
26
55
27
54
28
53
29
52
30
51
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
PE6/PWM4
PE7/SWP
PK0/RFDT
PK1/MCLK
PK2
PK3
PG0/EXI0
PG1/EXI1
PG2/DREF
PG3/DPG
PG4/DFG
PG5/CFG
PG6/RFG0
PG7/RFG1
PF0/AN0
PF1/AN1
PF2/AN2
PF3/AN3
PF4/AN4
PF5/AN5
PF6/AN6
PF7/AN7
AVDD
AVREF
AVss
SCK0
SO0
SI0
CS0
PH0/SCK1
Note) 1. NC (Pin 90) is always connected to VDD.
2. VSS (Pins 41 and 88) are both connected to GND.
3. MP (Pin 39) is always connected to GND.
–2–
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