CS2300-CP(2008) Просмотр технического описания (PDF) - Cirrus Logic

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Компоненты Описание

производитель

CS2300-CP
(Rev.:2008)

Fractional-N Clock Multiplier with Internal LCO

Cirrus Logic 

1. PIN DESCRIPTION

CS2300-CP

VD

1

GND

2

CLK_OUT

3

AUX_OUT

4

CLK_IN

5

10

SDA/CDIN

9

SCL/CCLK

8

AD0/CS

7

FILTN

6

FILTP

Pin Name

VD

GND

CLK_OUT

AUX_OUT

CLK_IN

FILTP

FILTN

AD0/CS

SCL/CCLK

SDA/CDIN

# Pin Description

1 Digital Power (Input) - Positive power supply for the digital and analog sections.

2 Ground (Input) - Ground reference.

3 PLL Clock Output (Output) - PLL clock output.

4 Auxiliary Output (Output) - This pin outputs a buffered version of one of the input or output clocks,

or a status signal, depending on register configuration.

5 Frequency Reference Clock Input (Input) - Clock input for the Digital PLL frequency reference.

6 LCO Filter Connections (Input/Output) - These pins provide external supply filtering for the inter-

7 nal LC Oscillator.

8 Address Bit 0 (I²C) / Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I²C

Mode. CS is the chip select signal in SPI Mode.

9 Control Port Clock (Input) - SCL/CCLK is the serial clock for the serial control port in I²C and SPI

mode.

10 Serial Control Data (Input/Output) - SDA is the data I/O line in I²C Mode. CDIN is the input data

line for the control port interface in SPI Mode.

4

DS843PP1

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