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ISL6118HIB Просмотр технического описания (PDF) - Renesas Electronics

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Компоненты Описание
производитель
ISL6118HIB
Renesas
Renesas Electronics Renesas
ISL6118HIB Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
ISL6118
Simplified Block Diagram
GND
CHANNEL 1 LIKE CHANNEL 2
FAULT_1
VIN
EN_1
EN_2
POR
Q-PUMP
CURRENT AND TEMP.
MONITORING, GATE AND
OUTPUT CONTROL
LOGIC
OUT_1
OUT_2
FAULT_2
Pin Descriptions
PIN NO. DESIGNATOR
FUNCTION
DESCRIPTION
1
GND
IC Reference
2
VIN
Chip Bias, Controlled VIN provides chip bias voltage. At VIN < 2.5V chip functionality is disabled, FAULT_X latch
Supply Input,
is cleared and floating and OUT is held low.
Undervoltage Lock-Out
3, 4 ENABLE_1, 2/ Channel Enable/
ENABLE_1, 2 Enable not Inputs
Enables/Disables switch.
5, 8 FAULT OUT_2, 1 Channel 2, 1
Channel overcurrent fault-not indicator. FAULT floats and is disabled until VIN > 2.5V. This
Overcurrent Fault not output is pulled low after the OC timeout period has expired and stays latched until ENABLE
Indicator
is deasserted.
6, 7
OUT_2, 1 Channel 2,1 Controlled Channel voltage output, connect to load to protect. Upon an OC condition OUT is current
Supply Output
limited to 0.6A. Current limit response time is within 200µs. This output will remain in current
limit for a determined time before being latched off.
FN9008 Rev 2.00
March 2004
Page 2 of 10

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