UPSD3212A(2009) Просмотр технического описания (PDF) - STMicroelectronics
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производитель
UPSD3212A
(Rev.:2009)
(Rev.:2009)
STMicroelectronics
UPSD3212A Datasheet PDF : 181 Pages
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UPSD3212A, UPSD3212C, UPSD3212CV
Architecture overview
Table 8.
CLR
XCH
XCH
XCH
XCH
Shifting a BCD number 2 digits to the right (using direct XCHs: 9 bytes)
2A
2B
2C
2D
2E
ACC
A
A,2Bh
A,2Ch
00
12
34
56
78
00
00
00
34
56
78
12
00
00
12
56
78
34
A,2Dh
A,2Eh
00
00
12
34
78
56
00
00
12
34
56
78
Table 9. Shifting a BCD number one digit to the right
2A 2B 2C 2D 2E ACC
MOV
MOV
R1,#2Eh
R0,#2Dh
00
12
34
56
78
xx
00
12
34
56
78
xx
LOOP:
; loop for R1 = 2Eh
MOV
A,@R1
XCHD
A,@R0
SWAP
A
MOV
@R1,A
DEC
R1
DEC
R0
CNJE
R1,#2Ah,LOOP
00
12
34
56
78
78
00
12
34
58
78
76
00
12
34
58
78
67
00
12
34
58
67
67
00
12
34
58
67
67
00
12
34
58
67
67
00
12
34
58
67
67
; loop for R1 = 2Dh
; loop for R1 = 2Ch
; loop for R1 = 2Bh
00
12
38
45
67
45
00
18
23
45
67
23
08
01
23
45
67
01
2.11.2
Note:
CLR
XCH
A
A,2Ah
08
01
23
45
67
00
00
01
23
45
67
08
External RAM
Table 10 shows a list of the Data Transfer instructions that access external Data Memory.
Only indirect addressing can be used. The choice is whether to use a one-byte address,
@Ri, where Ri can be either R0 or R1 of the selected register bank, or a two-byte
address, @DTPR.
In all external Data RAM accesses, the Accumulator is always either the destination or
source of the data.
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