UPSD3212A(2009) Просмотр технического описания (PDF) - STMicroelectronics

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производитель

UPSD3212A
(Rev.:2009)

Flash programmable system devices with 8032 MCU and USB and programmable logic

STMicroelectronics 

Architecture overview

UPSD3212A, UPSD3212C, UPSD3212CV

2.8.3

2.8.4

2.8.5

2.8.6

Register addressing

The register banks, containing registers R0 through R7, can be accessed by certain

instructions which carry a 3-bit register specification within the opcode of the instruction.

Instructions that access the registers this way are code efficient, since this mode eliminates

an address byte. When the instruction is executed, one of four banks is selected at

execution time by the two bank select bits in the PSW.

Example:

mov PSW, #0001000B ; select Bank0

mov A, #30H

mov R1, A

Register-specific addressing

Some instructions are specific to a certain register. For example, some instructions always

operate on the Accumulator, or Data Pointer, etc., so no address byte is needed to point it.

The opcode itself does that.

Immediate constants addressing

The value of a constant can follow the opcode in Program memory.

Example:

mov A, #10H.

Indexed addressing

Only Program memory can be accessed with indexed addressing, and it can only be read.

This addressing mode is intended for reading look-up tables in Program memory. A 16-bit

base register (either DPTR or PC) points to the base of the table, and the Accumulator is set

up with the table entry number. The address of the table entry in Program memory is formed

by adding the Accumulator data to the base pointer.

Example:

movc A, @A+DPTR

Figure 12. Indexed addressing

ACC

3Ah

DPTR

1E73h

Program Memory

3Eh

AI06643

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