DS2155 Просмотр технического описания (PDF) - Maxim Integrated

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производитель

DS2155

T1/E1/J1 Single-Chip Transceiver

Maxim Integrated 

DS2155

28.1 CHANNEL INTERLEAVE .........................................................................................................................184

28.2 FRAME INTERLEAVE..............................................................................................................................184

29. EXTENDED SYSTEM INFORMATION BUS (ESIB) .......................................................................187

30. PROGRAMMABLE BACKPLANE CLOCK SYNTHESIZER ........................................................191

31. FRACTIONAL T1/E1 SUPPORT .........................................................................................................191

32. USER-PROGRAMMABLE OUTPUT PINS........................................................................................193

33. TRANSMIT FLOW DIAGRAMS .........................................................................................................194

34. JTAG BOUNDARY SCAN ARCHITECTURE AND TEST ACCESS PORT .................................199

34.1 DESCRIPTION .........................................................................................................................................199

34.2 INSTRUCTION REGISTER........................................................................................................................202

34.3 TEST REGISTERS....................................................................................................................................204

34.4 BOUNDARY SCAN REGISTER .................................................................................................................204

34.5 BYPASS REGISTER .................................................................................................................................204

34.6 IDENTIFICATION REGISTER....................................................................................................................204

35. FUNCTIONAL TIMING DIAGRAMS.................................................................................................208

35.1 T1 MODE ...............................................................................................................................................208

35.2 E1 MODE ...............................................................................................................................................213

36. OPERATING PARAMETERS ..............................................................................................................222

37. AC TIMING PARAMETERS AND DIAGRAMS ...............................................................................224

37.1 MULTIPLEXED BUS AC CHARACTERISTICS ..........................................................................................224

37.2 NONMULTIPLEXED BUS AC CHARACTERISTICS ...................................................................................227

37.3 RECEIVE-SIDE AC CHARACTERISTICS ..................................................................................................230

37.4 BACKPLANE CLOCK TIMING: AC CHARACTERISTICS .........................................................................233

37.5 TRANSMIT AC CHARACTERISTICS ........................................................................................................234

38. PACKAGE INFORMATION ................................................................................................................237

38.1 100-PIN LQFP (56-G5002-000) ............................................................................................................237

38.2 100-BALL CSBGA (56-G6008-001) .....................................................................................................238

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