L9362(2013) Просмотр технического описания (PDF) - STMicroelectronics

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производитель

L9362
(Rev.:2013)

QUAD LOW SIDE DRIVER

STMicroelectronics 

1.0 Diagnostic Register and SPI timing

Figure 1. Impulse diagram to read the Diagnostic Register

NCS

L9362

CLK

SDO

FSL

LSB D1 D2 D3 D4 D5 D6

MSB

SDI

LSB D1 D2 D3 D4 D5 D6 MSB

FR_RESET

99AT0008

Note: FR_RESET means Reset failure storage (internal signal)

Figure 2. Diagnostic Failure Register Structure

MSB

LSB

D7 D6 D5 D4 D3 D2 D1 D0 FSL

99AT0009/A

Failure indicator bit

(only valid during NCS = LOW

to the first L to H CLK change

1: failure stored

0: no failures

Status channel 4

D0 D1 Status

1 1 no failures

1 0 open circuit, channel on

0 1 short to battery or overtemperature

0 0 short to gnd, channel off

Status channel 3

D2 D3 corresponding to D0 D1

Status channel 2

D4 D5 corresponding to D0 D1

Status channel 1

D6 D7 corresponding to D0 D1

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