M4A5-384/128-5SAC Просмотр технического описания (PDF) - Lattice Semiconductor

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M4A5-384/128-5SAC

ispMACH™ 4A CPLD Family High Performance E2CMOS® In-System Programmable Logic

Lattice Semiconductor 

Input Switch Matrix

The input switch matrix (Figures 12 and 13) optimizes routing of inputs to the central switch matrix.

Without the input switch matrix, each input and feedback signal has only one way to enter the central switch

matrix. The input switch matrix provides additional ways for these signals to enter the central switch matrix.

From Input Cell

17466G-002

Figure 12. ispMACH 4A with 2:1 Macrocell-I/O Cell

Ratio - Input Switch Matrix

17466G-003

Figure 13. ispMACH 4A with 1:1 Macrocell-I/O Cell

Ratio - Input Switch Matrix

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ispMACH 4A Family

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