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AN4506 Просмотр технического описания (PDF) - STMicroelectronics

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AN4506
Interrupt generation
5.5
Selective axis movement and wake-up interrupts
The L3GD20H interrupt signal can behave as selective axis movement detection and wake-
up. Whenever an interrupt condition is verified, the interrupt signal is generated and by
reading the IG_SRC register it is possible to understand which condition happened.
The selective axis movement detection signal (SA) and wake-up signal (WU) interrupt
generation block is represented in Figure 14.
The SA or WU interrupt generation is selected through the AND/OR bit in the IG_CFG
register. If the AND/OR bit is ‘0’, signals coming from comparators for the axis enabled
through the IG_CFG register are put in logical OR. In this case, interrupt is generated when
at least one of the enabled axes exceeds the threshold written in the module in the
IG_THS_xH and IG_THS_xL registers. Otherwise, if the AND/OR bit is ‘1’, signals coming
from comparators enter a “NAND” port. In this case an interrupt signal is generated only if all
the enabled axes are passing the threshold.
The LIR bit of IG_CFG allows the user to decide if the interrupt request must be latched or
not. If the LIR bit is ‘0’ (default value), the interrupt signal goes high when the interrupt
condition is satisfied and returns to low immediately if the interrupt condition is no longer
verified. Otherwise, if the LIR bit is ‘1’, whenever an interrupt condition is applied the
interrupt signal remains high even if the condition returns to a non-interrupt status until a
read of the IG_SRC register is performed.
The ZHIE, ZLIE, YHIE, YLIE, XHIE, and HLIE bits of the IG_CFG register allow the user to
decide on which axis the interrupt decision must be performed and in which direction the
threshold must be passed to generate the interrupt request.
Figure 14. No-move, wake-up interrupt generator
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DocID026442 Rev 2
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