W77E468 Просмотр технического описания (PDF) - Winbond

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W77E468

8 BIT MICROCONTROLLER

Winbond 

Preliminary W77E468

PIN DESCRIPTION

SYMBOL TYPE

DESCRIPTIONS

EA

I EXTERNAL ACCESS ENABLE: This pin forces the processor to execute out of

external ROM. It should be kept high to access internal ROM. The ROM

address and data will not be present on the bus if EA pin is high and the

program counter is within 32 KB area. Otherwise they will be present on the

bus.

PSEN

O PROGRAM STORE ENABLE: PSEN pin always emits pulses during access to

internal/external ROM.

ALE

O ADDRESS LATCH ENABLE: ALE is used to enable the address latch that

separates the address from the data on Port 0.

RST

I L RESET: A high on this pin for two machine cycles while the oscillator is running

resets the device.

XTAL1

I CRYSTAL1: This is the crystal oscillator input. This pin may be driven by an

external clock.

XTAL2

O CRYSTAL2: This is the crystal oscillator output. It is the inversion of XTAL1.

VSS

I GROUND: Ground potential.

VDD

I POWER SUPPLY: Supply voltage for operation.

A0−A15

O ADDRESS BUS: This bus dedicates program/data address output during

access to external ROM, on-chip ROM and external RAM.

D0−D7

I DATA BUS: This bus is used to read/write external memory or peripherals.

P0.0−P0.7 I/O PORT 0: Port 0 is an open-drain bi-directional I/O port.

P1.0−P1.7 I/O PORT 1: Port 1 is a bi-directional I/O port with internal pull-ups. The bits have

alternate functions which are described below:

T2(P1.0): Timer/Counter 2 external count input

T2EX(P1.1): Timer/Counter 2 Reload/Capture/Direction control

RXD1(P1.2): Serial port 2 RXD

TXD1(p1.3): Serial port 2 TXD

INT2(P1.4): External Interrupt 2

INT3 (P1.5): External Interrupt 3

INT4(P1.6): External Interrupt 4

INT5 (P1.7): External Interrupt 5

P2.0−P2.7 I/O PORT 2: Port 2 is a bi-directional I/O port with internal pull-ups.

Publication Release Date: January 1999

-5-

Revision A1

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