CS5150H Просмотр технического описания (PDF) - ON Semiconductor

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CS5150H

CPU 4−Bit Synchronous Buck Controller

ON Semiconductor 

CS5150H

level, the output capacitor is pre−positioned −40 mV (see

Figures 9, 10, and 11). For best transient response, a

combination of a number of high frequency and bulk output

capacitors are usually used.

If the maximum on time is exceeded while responding to

a sudden increase in load current, a normal off time occurs

to prevent saturation of the output inductor.

M 1.00 μs

Trace 1− Regulator Output Voltage (10 mV/div.)

Trace 2− Inductor Switching Node (5.0 V/div.)

Figure 8. Peak−to−Peak Ripple on VOUT = 2.8 V,

IOUT = 13 A (Heavy Load)

Transient Response

The CS5150H V2 control loop’s 100 ns reaction time

provides unprecedented transient response to changes in

input voltage or output current. Pulse by pulse adjustment of

duty cycle is provided to quickly ramp the inductor current

to the required level. Since the inductor current cannot be

changed instantaneously, regulation is maintained by the

output capacitor(s) during the time required to slew the

inductor current.

Overall load transient response is further improved

through a feature called “adaptive voltage positioning”. This

technique pre−positions the output capacitor’s voltage to

reduce total output voltage excursions during changes in

load.

Holding tolerance to 1.0% allows the error amplifier’s

reference voltage to be targeted +40 mV high without

compromising DC accuracy. A “droop resistor”,

implemented through a PC board trace, connects the error

amplifier’s feedback pin (VFB) to the output capacitors and

load and carries the output current. With no load, there is no

DC drop across this resistor, producing an output voltage

tracking the error amplifier’s, including the +40 mV offset.

When the full load current is delivered, an 80 mV drop is

developed across this resistor. This results in output voltage

being offset −40 mV low.

The result of adaptive voltage positioning is that

additional margin is provided for a load transient before

reaching the output voltage specification limits. When load

current suddenly increases from its minimum level, the

output capacitor is pre−positioned +40 mV. Conversely,

when load current suddenly decreases from its maximum

Trace 1− Regulator Output Voltage (1.0 V/div.)

Trace 2− Regulator Output Voltage (20 V/div.)

Figure 9. CS5150H Demonstration Board Response

to a 0.5 to 13 A Load Pulse (Output Set for 2.8 V)

Trace 1− Regulator Output Voltage (1.0 V/div.)

Trace 2− Inductor Switching Node (5.0 V/div.)

Trace 3− Output Current (0.5 to 13 Amps) (20 V/div.)

Figure 10. CS5150H Demonstration Board Response to

13 A Load Turn On (Output Set for 2.8 V). Upon

Completing a Normal Off Time, The V2 Control Loop

Immediately Connects the Inductor to the Input

Voltage, Providing 100% Duty Cycle. Regulation is

Achieved in Less Than 20 ms

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