DAC08RC/883C Просмотр технического описания (PDF) - Analog Devices

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DAC08RC/883C

8-Bit, High Speed, Multiplying D/A Converter

Analog Devices 

DAC08

TABLE OF CONTENTS

Features .............................................................................................. 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Electrical Characteristics ............................................................. 3

Typical Electrical Characteristics ............................................... 4

Absolute Maximum Ratings............................................................ 5

Thermal Resistance ...................................................................... 5

ESD Caution.................................................................................. 5

Pin Configuration and Function Descriptions............................. 6

Test and Burn-In Circuits................................................................ 7

Typical Performance Characteristics ............................................. 8

Basic Connections .......................................................................... 11

REVISION HISTORY

3/16—Rev. C to Rev. D

Added Thermal Resistance Section ............................................... 5

Changes to Table 4............................................................................ 5

Change to Figure 29 ....................................................................... 12

Updated Outline Dimensions ....................................................... 18

Changes to Ordering Guide .......................................................... 10

11/04—Rev. B to Rev. C

Changed SO to SOIC .........................................................Universal

Removed DIE ......................................................................Universal

Changes to Figure 30, Figure 31, Figure 32................................. 12

Change to Figure 33 ....................................................................... 15

Added Table 4.................................................................................. 16

Updated Outline Dimensions ....................................................... 17

Changes to Ordering Guide .......................................................... 18

Data Sheet

Application Information................................................................ 14

Reference Amplifier Setup ........................................................ 14

Reference Amplifier Compensation for Multiplying

Applications ................................................................................ 14

Logic Inputs................................................................................. 14

Analog Output Currents ........................................................... 14

Power Supplies ............................................................................ 15

Temperature Performance......................................................... 15

Multiplying Operation............................................................... 15

Settling Time............................................................................... 15

Analog Devices Current Output DACs ....................................... 17

Outline Dimensions ....................................................................... 18

Ordering Guide .......................................................................... 19

2/02—Rev. A to Rev. B

Edits to Specifications .......................................................................2

Edits to Absolute Maximum Ratings ..............................................3

Edits to Ordering Guide ...................................................................3

Edits to Wafer Test Limits ................................................................5

Edit to Figure 13 ................................................................................8

Edits to Figures 14 and 15 ................................................................9

Rev. D | Page 2 of 21

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