EVAL-AD5755-1SDZ Просмотр технического описания (PDF) - Analog Devices

Номер в каталоге

Компоненты Описание

производитель

EVAL-AD5755-1SDZ

Quad Channel, 16-Bit, Serial Input, 4 mA to 20 mA Output DAC, Dynamic Power Control, HART Connectivity

Analog Devices 

Data Sheet

SCLK

1

SYNC

24

32

1

24

t61

AD5757

32

SDIN

MSB

LSB CRC7

CRC0

MSB

LSB CRC7

CRC0

SDO

INPUT WORD SPECIFIES

REGISTER TO BE READ

8-BIT CRC

NOP

CONDITION

MSB

8-BIT CRC

LSB

UNDEFINED

t15

SELECTED REGISTER DATA

CLOCKED OUT

1AVOID SCLK ACTIVITY DURING t6 AS IT MAY RESULT IN A PEC ERROR ON READBACK.

SEE THE READBACK OPERATION AND PACKET ERROR CHECKING SECTIONS FOR FURTHER INFORMATION.

Figure 5. Readback Timing Diagram (Packet Error Checking Enabled)

8-BIT CRC

SCLK

LSB

1

2

MSB

24

SYNC

SDIN

R/W DUT_ DUT_

X

X

X

D15 D14

AD1 AD0

D1

D0

SDO

SDO DISABLED

SDO_

ENAB STATUS STATUS

Figure 6. Status Readback During Write

200µA

IOL

TO OUTPUT

PIN CL

50pF

VOH (MIN) OR

VOL (MAX)

200µA

IOH

Figure 7. Load Circuit for SDO Timing Diagram

STATUS STATUS

Rev. G | Page 9 of 45

Share Link: