EVAL-AD5755-1SDZ Просмотр технического описания (PDF) - Analog Devices

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EVAL-AD5755-1SDZ

Quad Channel, 16-Bit, Serial Input, 4 mA to 20 mA Output DAC, Dynamic Power Control, HART Connectivity

Analog Devices 

AD5757

Data Sheet

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted. Transient currents of up to

100 mA do not cause SCR latch-up.

Table 4.

Parameter

AVDD, VBOOST_x to AGND, DGND

AVCC to AGND

DVDD to DGND

Digital Inputs to DGND

Digital Outputs to DGND

REFIN, REFOUT to AGND

IOUT_x to AGND

SWx to AGND

AGND, GNDSWx to DGND

Operating TemperatureRange (TA)

Industrial1

Storage Temperature Range

Junction Temperature (TJ max)

64-Lead LFCSP

θJA Thermal Impedance2

Power Dissipation

Lead Temperature

Soldering

Rating

−0.3 V to +33 V

−0.3 V to +7 V

−0.3 V to +7 V

−0.3 V to DVDD + 0.3 V or +7 V

(whichever is less)

−0.3 V to DVDD + 0.3 V or +7 V

(whichever is less)

−0.3 V to AVDD + 0.3 V or +7 V

(whichever is less)

AGND to VBOOST_x or 33 V if using

the dc-to-dc circuitry

−0.3 V to +33 V

−0.3 V to +0.3 V

−40°C to +105°C

−65°C to +150°C

125°C

28°C/W

(TJ max – TA)/θJA

JEDEC industry standard

J-STD-020

1 Power dissipated on chip must be derated to keep the junction temperature

below 125°C.

2 Based on a JEDEC 4-layer test board.

Stresses at or above those listed under Absolute Maximum

Ratings may cause permanent damage to the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the operational

section of this specification is not implied. Operation beyond

the maximum operating conditionsfor extended periods may

affect product reliability.

ESD CAUTION

Rev. G | Page 10 of 45

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