MAX6743(2003) Просмотр технического описания (PDF) - Maxim Integrated

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MAX6743
(Rev.:2003)

Low-Power Dual-/Triple-Voltage SC70 µP Supervisory Circuits

Maxim Integrated 

Low-Power Dual-/Triple-Voltage SC70 µP

Supervisory Circuits

PUSHBUTTON

SWITCH

OPEN

CLOSED

SWITCH

BOUNCE

SWITCH

BOUNCE

SWITCH

BOUNCE

SWITCH

BOUNCE

VCC1

tDEB

RESET

tMRP

tDEB

tMRP

GND

Figure 2. MAX6740/MAX6741/MAX6742 Manual Reset Timing Diagram

released. The manual reset detect function is internally

debounced for the tDEB timeout period, so the output

can be connected directly to a momentary pushbutton

switch, if desired (Figure 2).

Manual Reset Input

Many microprocessor-based products require manual

reset capability, allowing the operator, a test techni-

cian, or external logic circuitry to initiate a reset while

the monitored supplies remain above their reset thresh-

olds. The MAX6736–MAX6739 have a dedicated

active-low MR input. The RESET is asserted low while

MR is held low and remains asserted for the manual

reset timeout period after MR returns high. The MR

input has an internal 1.5kΩ pullup resistor to VCC1 and

can be left unconnected if not used. MR can be driven

with CMOS logic levels, open-drain/open-collector out-

puts, or a momentary pushbutton switch to GND to cre-

ate a manual reset function.

Adjustable Input Voltage

The MAX6738/MAX6739 and MAX6740/MAX6743 pro-

vide an additional input to monitor a second or third

system voltage. The threshold voltage at RSTIN is typi-

VEXT_TH

R1

R2

MAX6738

MAX6739

MAX6740

MAX6743

RSTIN

GND

cally 488mV. Connect a resistor-divider network to the

circuit as shown in Figure 3 to establish an externally

controlled threshold voltage, VEXT_TH.

VEXT_TH = 0.488V((R1 + R2) / R2)

Low leakage current at RSTIN allows the use of large-

valued resistors, resulting in reduced power consump-

tion of the system.

Power-Fail Comparator

PFI is the noninverting input to an auxiliary comparator. A

488mV internal reference (VTH-PFI) is connected to the

inverting input of the comparator. If PFI is less than

488mV, PFO is asserted low. PFO deasserts without a

timeout period when PFI rises above the externally set

threshold. Common uses for the power-fail comparator

include monitoring for low battery conditions or a failing

DC-DC converter input voltage (see the Typical

Application Circuits). The asserted PFO output can place

a system in a low-power suspend mode or support an

orderly system shutdown before monitored VCC voltages

drop below the reset thresholds. Connect PFI to an exter-

nal resistor-divider network as shown in Figure 4 to set

the desired trip threshold. Connect PFI to VCC1 if unused.

Applications Information

Interfacing to the µP with

Bidirectional Reset Pins

Most microprocessors with bidirectional reset pins can

interface directly to open-drain RESET output options.

Systems simultaneously requiring a push-pull RESET

output and a bidirectional reset interface can be in

logic contention. To prevent contention, connect a

4.7kΩ resistor between RESET and the µP’s reset I/O

port as shown in Figure 5.

Figure 3. Monitoring an Additional Voltage

______________________________________________________________________________________ 11

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