KSZ8051MNL Просмотр технического описания (PDF) - Microchip Technology
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KSZ8051MNL Datasheet PDF : 66 Pages
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KSZ8051MNL/RNL
TABLE 2-1: SIGNALS - KSZ8051MNL (CONTINUED)
Pin
Number
21
22
23
24
25
26
27
28
29
30
Pin
Name
INTRP/
NAND_Tree#
TXC
TXEN
TXD0
TXD1
TXD2
TXD3
COL/
CONFIG0
CRS/
CONFIG1
LED0/
NWAYEN
Type
Note
2-1
Ipu/
Opu
I/O
I
I
I
I
I
Ipd/O
Ipd/O
Ipu/O
Description
Interrupt output: Programmable interrupt output
This pin has a weak pull-up, is open-drain, and requires an external 1.0 kΩ
pull-up resistor.
Config mode: The pull-up/pull-down value is latched as NAND Tree# at the
de-assertion of reset.
See the Strap-In Options - KSZ8051MNL section for details.
MII mode: MII Transmit Clock output
MII back-to-back mode: MII Transmit Clock input
MII mode: MII Transmit Enable input
MII mode: MII Transmit Data Input[0] (Note 2-3)
MII mode: MII Transmit Data Input[1] (Note 2-3)
MII mode: MII Transmit Data Input[2] (Note 2-3)
MII Mode: MII Transmit Data Input[3] (Note 2-3)
MII mode: MII Collision Detect output
Config mode: The pull-up/pull-down value is latched as CONFIG0 at the de-
assertion of reset.
See the Strap-In Options - KSZ8051MNL section for details.
MII mode: MII Carrier Sense output
Config mode: The pull-up/pull-down value is latched as CONFIG1 at the de-
assertion of reset.
See the Strap-In Options - KSZ8051MNL section for details.
LED output: Programmable LED0 output
Config mode: Latched as auto-negotiation enable (Register 0h, bit [12]) at the
de-assertion of reset.
See the Strap-In Options - KSZ8051MNL section for details.
The LED0 pin is programmable using Register 1Fh bits [5:4], and is defined
as follows.
LED Mode = [00]
Link/Activity
Pin State
LED Definition
No Link
High
OFF
Link
Low
ON
Activity
Toggle
Blinking
LED Mode = [01]
Link
No Link
Pin State
High
LED Definition
OFF
Link
Low
ON
LED Mode = [10], [11]: Reserved
2016 Microchip Technology Inc.
DS00002310A-page 7
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