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KSZ8051MNL Просмотр технического описания (PDF) - Microchip Technology

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KSZ8051MNL Datasheet PDF : 66 Pages
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KSZ8051MNL/RNL
TABLE 2-1: SIGNALS - KSZ8051MNL (CONTINUED)
Pin
Number
Pin
Name
Type
Note
2-1
Description
7
TXP
I/O Physical transmit or receive signal (+ differential)
8
XO
O
Crystal feedback for 25 MHz crystal
This pin is a no connect if an oscillator or external clock source is used.
9
XI
I
Crystal/Oscillator/External Clock input
25 MHz ±50 ppm
10
REXT
I
Set PHY transmit output current
Connect a 6.49 kresistor to ground on this pin.
11
MDIO
Ipu/
Opu
Management Interface (MII) Data I/O
This pin has a weak pull-up, is open-drain, and requires an external 1.0 k
pull-up resistor.
12
MDC
Ipu
Management Interface (MII) Clock input
This clock pin is synchronous to the MDIO data pin.
MII mode: MII Receive Data Output[3] (Note 2-2)
13
RXD3/
PHYAD0
Ipu/O
Config mode: The pull-up/pull-down value is latched as PHYADDR[0] at the
de assertion of reset.
See the Strap-In Options - KSZ8051MNL section for details.
MII mode: MII Receive Data Output[2] (Note 2-2)
14
RXD2/
PHYAD1
Ipd/O
Config mode: The pull-up/pull-down value is latched as PHYADDR[1] at the
deassertion of reset.
See the Strap-In Options - KSZ8051MNL section for details.
MII mode: MII Receive Data Output[1] (Note 2-2)
15
RXD1/
PHYAD2
Ipd/O
Config mode: The pull-up/pull-down value is latched as PHYADDR[2] at the
de assertion of reset.
See the Strap-In Options - KSZ8051MNL section for details.
MII mode: MII Receive Data Output[0] (Note 2-2)
16
RXD0/
DUPLEX
Ipu/O
Config mode: The pull-up/pull-down value is latched as DUPLEX at the de-
assertion of reset.
See the Strap-In Options - KSZ8051MNL section for details.
17
VDDIO
P
3.3V, 2.5V, or 1.8V digital VDD
MII mode: MII Receive Data Valid output
18
RXDV/
CONFIG2
Ipd/O
Config mode: The pull-up/pull-down value is latched as CONFIG2 at the de-
assertion of reset.
See the Strap-In Options - KSZ8051MNL section for details.
MII mode: MII Receive Clock output
19
RXC/
B-CAST_OFF
Ipd/O
Config mode: The pull-up/pull-down value is latched as B-CAST_OFF at the
de assertion of reset.
See the Strap-In Options - KSZ8051MNL section for details.
MII mode: MII Receive Error output
20
RXER/ISO
Ipd/O
Config mode: The pull-up/pull-down value is latched as ISOLATE at the de-
assertion of reset.
See the Strap-In Options - KSZ8051MNL section for details.
DS00002310A-page 6
2016 Microchip Technology Inc.

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