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KSZ8051MNLU-TR Просмотр технического описания (PDF) - Microchip Technology

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KSZ8051MNLU-TR Datasheet PDF : 66 Pages
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KSZ8051MNL/RNL
FIGURE 3-1:
AUTO-NEGOTIATION FLOW CHART
START AUTO-NEGOTIATION
FORCE LINK SETTING
NO
YES
BYPASS AUTO-NEGOTIATION
AND SET LINK MODE
ATTEMPT AUTO-
NEGOTIATION
PARALLEL
OPERATION
LISTEN FOR 100BASE-TX
IDLES
LISTEN FOR 10BASE-T
LINK PULSES
NO
JOIN FLOW
LINK MODE SET?
YES
LINK MODE SET
3.2 MII Data Interface (KSZ8051MNL Only)
The Media Independent Interface (MII) is compliant with the IEEE 802.3 Specification. It provides a common interface
between MII PHYs and MACs, and has the following key characteristics:
• Pin count is 15 pins (6 pins for data transmission, 7 pins for data reception, and 2 pins for carrier and collision indi-
cation).
• 10 Mbps and 100 Mbps data rates are supported at both half- and full-duplex.
• Data transmission and reception are independent and belong to separate signal groups.
• Transmit data and receive data are each 4 bits wide, a nibble.
By default, the KSZ8051MNL is configured to MII mode after it is powered up or hardware reset with the following:
• A 25 MHz crystal connected to XI, XO (pins 9, 8), or an external 25 MHz clock source (oscillator) connected to XI.
• The CONFIG[2:0] strapping pins (pins 18, 29, 28) set to 000 (default setting).
2016 Microchip Technology Inc.
DS00002310A-page 17

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