KSZ8051MNL/RNL
TABLE 2-4: STRAP-IN OPTIONS - KSZ8051RNL (CONTINUED)
Pin Number Pin Name
Type
Note 2-4
Description
NAND Tree Mode:
21
NAND_Tree#
Ipu/Opu
Pull-up (default) = Disable
Pull-down = Enable
At the de-assertion of reset, this pin value is latched by the chip.
Note 2-4
Ipu/O = Input with internal pull-up during power-up/reset; output pin otherwise.
Ipd/O = Input with internal pull-down during power-up/reset; output pin otherwise.
Ipu/Opu = Input with internal pull-up and output with internal pull-up.
DS00002310A-page 14
2016 Microchip Technology Inc.