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CMX860D6

Telephone Signaling Transceiver

MX-COM Inc  

Telephone Signaling Transceiver

14

CMX860 Advance Information

4.9 Rx Data Register and USART

The Rx USART can be programmed to treat the received data bit stream as Synchronous data or as Start-

Stop characters.

In Synchronous mode the received data bits are all fed into the Rx Data Buffer which is copied into the C-BUS

Rx Data Register after every 8 bits.

In Start-stop mode the USART Control logic looks for the start of each character, then feeds only the required

number of data bits (not parity) into the Rx Data Buffer. The parity bit (if used) and the presence of a Stop bit

are then checked and the data bits in the Rx Data Buffer copied to the C-BUS Rx Data Register.

Status Register: b9

"1010"

Detector

b7

Continuous

1s Detector

'C-BUS' Interface

Rx data Rx Data Register

to µC

7

0

Rx Data Buffer

From FSK

Demodulator

Parity bit checker

Rx USART

Start/Stop bits

USART Control

Bit rate clock

Figure 11: Rx Modem Data Paths

Whenever a new character is copied into the C-BUS Rx Data Register, the Rx Data Ready flag bit of the

Status Register is set to 1 to prompt the µC to read the new data, and, in Start-stop mode, the Even Rx Parity

flag bit of the Status Register is updated.

In Start-stop mode, if the Stop bit is missing (received as a ‘0’ instead of a ‘1’) the received character will still

be placed into the Rx Data Register and the Rx Data Ready flag bit set, but the Status Register Rx Framing

Error bit will also be set to ‘1’ and the USART will re-synchronize onto the next ‘1’ – ‘0’ (Stop – Start)

transition. The Rx Framing Error bit will remain set until the next character has been received.

Rx Signal:

Start B0 B1

B7 Par'y Stop

Rx Data Ready flag bit:

Figure 12: Rx USART Function (Start-stop mode, 8 Data Bits + Parity)

If the µC has not read the previous data from the Rx Data Register by the time that new data is copied to it

from the Rx Data Buffer then the Rx Data Overflow flag bit of the Status Register will be set to 1.

The Rx Data Ready flag and Rx Data Overflow bits are cleared to 0 when the Rx Data Register is read by the

µC.

4.10 Rx Modem Pattern Detectors

The '1010' pattern detector will set bit 9 of the Status Register when 32 bits of alternating 1's and 0's have

been received. The continuous 1's detector will set bit 7 of the Status Register when 32 consecutive 1's have

been received. Both pattern detectors will hold their 'detect' output for 12 bit times after the end of the

detected pattern unless the received bit rate or operating mode is changed, in which case the detectors are

reset within 2ms.

ã2000 MX-COM, Inc.

www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054

Doc. # 20480222.002

4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies.

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