CMX860D6 Просмотр технического описания (PDF) - MX-COM Inc

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CMX860D6

Telephone Signaling Transceiver

MX-COM Inc  

Telephone Signaling Transceiver

12

CMX860 Advance Information

Every time the contents of the C-BUS Tx Data Register are transferred to the Tx Data Buffer the Tx Data

Ready flag bit of the Status Register is set to 1 to indicate that a new value should be loaded into the C-BUS

Tx Data Register. This flag bit is cleared to 0 when a new value is loaded into the Tx Data Register.

Tx Line Signal:

Start B0 B1

B7 Par'y Stop

Tx Data Ready flag bit:

Figure 8: Tx USART Function (Start-Stop mode, 8 Data Bits + Parity)

If a new value is not loaded into the Tx Data Register in time for the next Tx Data Register to Tx Data Buffer

transfer then the Status Register Tx Data Underflow bit will be set to 1. In this event the contents of the Tx

Data Buffer will be re-transmitted if Synchronous Data mode has been selected, or if the Tx modem is in

Start-stop mode then a continuous Stop signal (1) will be transmitted until a new value is loaded into the Tx

Data Register.

The transmitted bit rates are determined by the XTAL frequency.

4.2 FSK Modulator

Serial data from the USART is fed to the FSK modulator. One of two frequencies is generated according to

the current transmit data bit.

4.3 Tx Filter and Equalizer

The FSK modulator output signal is fed through the Transmit Filter and Equalizer block that limits the out-of-

band signal energy to acceptable limits. When transmitting 1200bps FSK, this block includes a fixed

compromise line equalizer that may be enabled or disabled by bit 10 of the General Control Register. The

amount of Tx equalization provided compensates for one quarter of the relative amplitude and delay distortion

of ETS Test Line 1 over the frequency band used.

4.4 DTMF/Tones Generator

In DTMF/Tones mode, this block generates DTMF signals or single or dual frequency tones.

4.5 Tx Level Control and Output Drivers

The CMX860 generated signal (if present) from the FSK/DTMF/Tones Generator is passed through the

programmable Tx Level Control before being passed to the switched paths controlled by the Analog Signal

Path Register. The Tx Output Drivers have symmetrical outputs to provide sufficient line voltage swing at low

values of AVDD and to reduce harmonic distortion of the signal. The Drivers can also transmit the signal from

the other port (e.g. Phone Input to Line Driver) or can be independently set to Bias or Power-saved –

see 4.12.7.

4.6 DTMF Decoder and Tone Detectors

In Rx Tones Detect mode the received signal, after passing through the Rx Gain Control block, is fed to the

DTMF decoder and CAS Tones/Call Progress/Answer Tone detector. The user may select one of four

separate operations:

The DTMF decoder detects standard DTMF signals. A valid DTMF signal will set bit 5 of the Status Register

to 1 for as long as the signal is detected. The DTMF signal is then decoded and output in bits 0 to 3 of the

Status Register.

The programmable tone pair detector includes two separate tone detectors (see Figure 16). The first detector

will set bit 6 of the Status Register for as long as a valid signal is detected, the second detector sets bit 7, and

bit 10 of the Status Register will be set when both tones are detected. The frequency and bandwidth of each

detector can be set in the Programming Register. Without programming, the default values in the

Programming Register are set for CAS tone detection.

The Call Progress detector measures the amplitude of the signal at the output of a 275 Hz - 665 Hz bandpass

filter and sets bit 10 of the Status Register to 1 when the signal level exceeds the measurement threshold.

ã2000 MX-COM, Inc.

www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054

Doc. # 20480222.002

4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies.

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