PSD853F5VA-70JIT Просмотр технического описания (PDF) - STMicroelectronics

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PSD853F5VA-70JIT

Flash in-system programmable (ISP) ipherals for 8-bit MCUs, 5 V

STMicroelectronics 

PSD8XXFX

1

Summary description

Summary description

The PSD8XXFX family of memory systems for microcontrollers (MCUs) brings in-system-

programmability (ISP) to Flash memory and programmable logic. The result is a simple and

flexible solution for embedded designs. PSD devices combine many of the peripheral

functions found in MCU based applications.

Table 2 summarizes all the devices.

The CPLD in the PSD devices features an optimized macrocell logic architecture. The PSD

macrocell was created to address the unique requirements of embedded system designs. It

allows direct connection between the system address/data bus, and the internal PSD

Obsolete Product(s) - Obsolete Product(s) Table 2.

registers, to simplify communication between the MCU and other supporting devices.

The PSD device includes a JTAG serial programming interface, to allow in-system

programming (ISP) of the entire device. This feature reduces development time, simplifies

the manufacturing flow, and dramatically lowers the cost of field upgrades. Using ST’s

special Fast-JTAG programming, a design can be rapidly programmed into the PSD in as

little as seven seconds.

The innovative PSD8XXFX family solves key problems faced by designers when managing

discrete Flash memory devices, such as:

● First-time in-system programming (ISP)

● Complex address decoding

● Simultaneous read and write to the device.

The JTAG Serial Interface block allows in-system programming (ISP), and eliminates the

need for an external Boot EPROM, or an external programmer. To simplify Flash memory

updates, program execution is performed from a secondary Flash memory while the primary

Flash memory is being updated. This solution avoids the complicated hardware and

software overhead necessary to implement IAP.

ST makes available a software development tool, PSDsoft™ Express, that generates ANSI-

C compliant code for use with your target MCU. This code allows you to manipulate the non-

volatile memory (NVM) within the PSD. Code examples are also provided for:

● Flash memory IAP via the UART of the host MCU

● Memory paging to execute code across several PSD memory pages

● Loading, reading, and manipulation of PSD macrocells by the MCU.

Product range

Primary Flash Secondary

Part number(1)

memory

Flash memory

(8 sectors)

(4 sectors)

SRAM

I/O

ports

Number of

macrocells

Input Output

Serial ISP

JTAG/ISC

port

Turbo

mode

PSD813F2

PSD813F4

1 Mbit

1 Mbit

256 Kbit

16 Kbit 27

24

16

yes

yes

256 Kbit

none

27

24

16

yes

yes

PSD813F5

PSD833F2

PSD834F2

1 Mbit

1 Mbit

2 Mbit

none

none

27

24

16

yes

yes

256 Kbit

64 Kbit 27

24

16

yes

yes

256 Kbit

64 Kbit 27

24

16

yes

yes

Doc ID 7833 Rev 7

11/128

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