M48T59-70MH1(2008) Просмотр технического описания (PDF) - STMicroelectronics

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Компоненты Описание

производитель

M48T59-70MH1
(Rev.:2008)

5.0 or 3.3 V, 64 Kbit (8 Kbit x 8) TIMEKEEPER® SRAM

STMicroelectronics 

M48T59, M48T59Y, M48T59V

Operation modes

The state of the eight three-state Data I/O signals is controlled by E and G. If the outputs are

activated before tAVQV, the data lines will be driven to an indeterminate state until tAVQV. If

the Address Inputs are changed while E and G remain active, output data will remain valid

for Output Data Hold time (tAXQX) but will go indeterminate until the next Address Access.

Figure 5. Read mode AC waveforms

A0-A12

tAVAV

VALID

tAVQV

tELQV

E

tAXQX

tEHQZ

tELQX

tGLQV

tGHQZ

G

duct(s) DQ0-DQ7

tGLQX

VALID

AI01385

Pro Note:

WRITE enable (W) = High.

lete Table 3. Read mode AC characteristics

bso Symbol

Parameter(1)

M48T59/Y/V

–70

Unit

- O Min

Max

t(s) tAVAV

tAVQV(2)

uc tELQV(2)

d tGLQV(2)

ro tELQX(3)

P tGLQX(3)

te tEHQZ(3)

le tGHQZ(3)

so tAXQX(2)

READ cycle time

Address valid to output valid

Chip enable low to output valid

Output enable low to output valid

Chip enable low to output transition

Output enable low to output transition

Chip enable high to output Hi-Z

Output enable high to output Hi-Z

Address transition to output transition

70

ns

70

ns

70

ns

35

ns

5

ns

5

ns

25

ns

25

ns

10

ns

b1. Valid for ambient operating temperature: TA = 0 to 70°C; VCC = 4.5 to 5.5 V, 4.75 to 5.5 V, or 3.0 to 3.6 V (except where

O noted).

2. CL = 100pF (see Figure 13 on page 22).

3. CL = 5pF (see Figure 13 on page 22).

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