M48T59-70MH1(2008) Просмотр технического описания (PDF) - STMicroelectronics

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производитель

M48T59-70MH1
(Rev.:2008)

5.0 or 3.3 V, 64 Kbit (8 Kbit x 8) TIMEKEEPER® SRAM

STMicroelectronics 

Description

M48T59, M48T59Y, M48T59V

Table 1. Signal names

A0-A12

Address inputs

DQ0-DQ7

Data inputs / outputs

IRQ/FT

Interrupt / frequency test output (open drain)

RST

Reset output (open drain)

E

Chip enable

G

Output enable

W

Write enable

VCC

Supply voltage

VSS

Ground

Figure 2. 28-pin SOIC connections

RST

A12

t(s) A7

A6

c A5

du A4

ro A3

P A2

te A1

le A0

o DQ0

s DQ1

b DQ2

) - O VSS

1

28

2

27

3

26

4

25

5

24

6

23

7 M48T59Y 22

8 M48T59V 21

9

20

10

19

11

18

12

17

13

16

14

15

AI01382E

VCC

W

IRQ/FT

A8

A9

A11

G

A10

E

DQ7

DQ6

DQ5

DQ4

DQ3

ct(s Figure 3. PCDIP28 CAPHAT connections

du RST 1

ro A12 2

28 VCC

27 W

P A7 3

26 IRQ/FT

te A6 4

25 A8

le A5 5

24 A9

o A4 6

23 A11

bs A3 7 M48T59 22 G

O A2 8 M48T59Y 21 A10

A1 9

20 E

A0 10

19 DQ7

DQ0 11

18 DQ6

DQ1 12

17 DQ5

DQ2 13

16 DQ4

VSS 14

15 DQ3

AI01381D

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