IRF740S, SiHF740S
Vishay Siliconix
VDS
Vary tp to obtain
required IAS
Rg
10 V
tp
L
D.U.T
IAS
0.01 W
+
- V DD
Fig. 12a - Unclamped Inductive Test Circuit
VDS
VDS
tp
VDD
IAS
Fig. 12b - Unclamped Inductive Waveforms
1200
1000
800
Top
Bottom
ID
4.5 A
5.3 A
10 A
600
400
200
0 VDD = 50 V
25
50
75
100
125
150
91055_12c
Starting TJ, Junction Temperature (°C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
VGS
QGS
VG
QG
QGD
Charge
Fig. 13a - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
12 V
50 kΩ
0.2 µF
0.3 µF
+
D.U.T. - VDS
VGS
3 mA
IG
ID
Current sampling resistors
Fig. 13b - Gate Charge Test Circuit
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Document Number: 91055
S11-1049-Rev. C, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000