74LVT2952 Просмотр технического описания (PDF) - NXP Semiconductors.
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74LVT2952 Datasheet PDF : 18 Pages
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NXP Semiconductors
74LVT2952
3.3 V Octal registered transceiver; 3-State
5.2 Pin description
Table 2. Pin description
Symbol
Pin
B7 to B0
1, 2, 3, 4, 5, 6, 7, 8
OEAB, OEBA
9, 15
CPAB, CPBA
10, 14
CEAB, CEBA
11, 13
GND
12
A0 to A7
16, 17, 18, 19, 20, 21, 22, 23
VCC
24
6. Functional description
Description
data input/output (B side)
output enable input (active LOW)
clock input
clock enable input
ground (0 V)
data input/output (A side)
supply voltage
Table 3.
Inputs
An, Bn
X
L
H
Function selection[1]
CPxx[2]
X
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
= LOW-to-HIGH clock transition;
nc = no change.
[2] xx = AB or BA.
CExx[2]
H
L
L
Internal
nc
L
H
Operating mode
hold data
load data
load data
Table 4.
Inputs
OExx[2]
H
L
L
Function selection[1]
Internal Q
X
L
H
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high impedance OFF-state.
[2] xx = AB or BA.
An, Bn outputs
Z
L
H
Operating mode
outputs disabled
outputs enabled
outputs enabled
74LVT2952
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 11 September 2013
© NXP B.V. 2013. All rights reserved.
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