PCA8550D Просмотр технического описания (PDF) - NXP Semiconductors.

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PCA8550D

4-bit multiplexed/1-bit latched 5-bit I2C EEPROM DIP switch

NXP Semiconductors. 

NXP Semiconductors

PCA8550

4-bit multiplexed/1-bit latched 5-bit I2C EEPROM DIP switch

I2C SCL 1

I2C SDA 2

OVERRIDE_N 3

MUX_IN A 4

MUX_IN B 5

MUX_IN C 6

MUX_IN D 7

GND 8

PCA8550DB

Fig 3. Pin configuration for SSOP16

16 VCC

15 WP

14 NON_MUXED_OUT

13 MUX_SELECT

12 MUX_OUT A

11 MUX_OUT B

10 MUX_OUT C

9 MUX_OUT D

aaa-017598

I2C SCL 1

I2C SDA 2

OVERRIDE_N 3

MUX_IN A 4

MUX_IN B 5

MUX_IN C 6

MUX_IN D 7

GND 8

PCA8550PW

Fig 4. Pin configuration for TSSOP16

16 VCC

15 WP

14 NON_MUXED_OUT

13 MUX_SELECT

12 MUX_OUT A

11 MUX_OUT B

10 MUX_OUT C

9 MUX_OUT D

aaa-017599

6. Functional description

When the MUX_SELECT signal is logic 0, the multiplexer will select the data from the

non-volatile register to drive on the MUX_OUT pins. When the MUX_SELECT signal is

logic 1, the multiplexer will select the MUX_IN lines to drive on the MUX_OUT pins. The

MUX_SELECT signal is also used to latch the NON_MUXED_OUT signal which outputs

data from the non-volatile register. The NON_MUXED_OUT signal latch is transparent

when MUX_SELECT is in a logic 0 state, and will latch data when MUX_SELECT is in a

logic 1 state. When the active-LOW OVERRIDE_N signal is set to logic 0 and the

MUX_SELECT signal is at a logic 0, all outputs will be driven to logic 0. This information is

summarized in Table 1. The write protect (WP) input is used to control the ability to write

the contents of the 5-bit non-volatile register. If the WP signal is logic 0, the I2C-bus will be

able to write the contents of the non-volatile register. If the WP signal is logic 1, data will

not be allowed to be written into the non-volatile register.

The factory default for the contents of the non-volatile register are all logic 0. These stored

values can be read or written using the I2C-bus (described in the next section).

The OVERRIDE_N, WP, MUX_IN, and MUX_SELECT signals have internal pull-up

resistors. See Section 9 and Section 10 for hysteresis and signal spike suppression

figures.

PCA8550

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 7 — 8 April 2015

© NXP Semiconductors N.V. 2015. All rights reserved.

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