PCA8550D Просмотр технического описания (PDF) - NXP Semiconductors.
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PCA8550D Datasheet PDF : 23 Pages
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NXP Semiconductors
PCA8550
4-bit multiplexed/1-bit latched 5-bit I2C EEPROM DIP switch
5. Pinning information
5.1 Pin description
Table 3. Pin description
Symbol
Pin
I2C SCL
1
I2C SDA
2
OVERRIDE_N
3
MUX_IN A
4
MUX_IN B
5
MUX_IN C
6
MUX_IN D
7
GND
8
MUX_OUT D
9
MUX_OUT C
10
MUX_OUT B
11
MUX_OUT A
12
MUX_SELECT
13
NON_MUXED_OUT
14
WP
15
VCC
16
Description
I2C-bus clock
Bi-directional I2C-bus data
Forces all outputs to logic 0
External inputs to multiplexer
Common ground voltage rail
2.5 V multiplexed output
Selects MUX_IN inputs or register contents for MUX_OUT
outputs
TTL-level output from non-volatile memory
Non-volatile register write-protect
Positive voltage rail
I2C SCL 1
I2C SDA 2
OVERRIDE_N 3
MUX_IN A 4
MUX_IN B 5
MUX_IN C 6
MUX_IN D 7
GND 8
16 VCC
15 WP
14 NON_MUXED_OUT
13 MUX_SELECT
PCA8550D
12 MUX_OUT A
11 MUX_OUT B
10 MUX_OUT C
9 MUX_OUT D
aaa-017597
Fig 2. Pin configuration for SO16
PCA8550
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 8 April 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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