85304-01 Просмотр технического описания (PDF) - Integrated Device Technology

Номер в каталоге

Компоненты Описание

производитель

85304-01

Low Skew, 1-to-5, Differential-to-3.3V LVPECL Fanout Buffer

Integrated Device Technology 

85304-01 Data Sheet

Differential Clock Input Interface

The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL and

other differential signals. Both VSWING and VOH must meet the VPP

and VCMR input requirements. Figures 2A to 2F show interface

examples for the CLK/nCLK input driven by the most common driver

types. The input interfaces suggested here are examples only.

Please consult with the vendor of the driver component to confirm the

driver termination requirements. For example, in Figure 2A, the input

termination applies for IDT’s open emitter LVHSTL drivers. If you are

using an LVHSTL driver from another vendor, use their termination

recommendation.

1.8V

Zo = 50Ω

Zo = 50Ω

LVHSTL

IDT

LVHSTL Driver

3.3V

CLK

R1

R2

50Ω

50Ω

nCLK

Differential

Input

Figure 2A. CLK/nCLK Input Driven by an

IDT Open Emitter LVHSTL Driver

Figure 2B. CLK/nCLK Input

Driven by a 3.3V LVPECL Driver

Figure 2C. CLK/nCLK Input

Driven by a 3.3V LVPECL Driver

3.3V

*R3

*R4

HCSL

3.3V

CLK

nCLK

Differential

Input

Figure 2D. CLK/nCLK Input

Driven by a 3.3V LVDS Driver

2.5V

SSTL

Zo = 60Ω

Zo = 60Ω

2.5V

R3

120Ω

R4

120Ω

3.3V

CLK

R1

120Ω

R2

120Ω

nCLK

Differential

Input

Figure 2E. CLK/nCLK Input

Driven by a 3.3V HCSL Driver

©2015 Integrated Device Technology, Inc

Figure 2F. CLK/nCLK Input

Driven by a 2.5V SSTL Driver

8

Revision E December 2, 2015

Share Link: