CA3082(1999) Просмотр технического описания (PDF) - Intersil
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CA3082 Datasheet PDF : 6 Pages
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CA3081, CA3082
Absolute Maximum Ratings TA = 25oC
Collector-to-Emitter Voltage (VCEO) . . . . . . . . . . . . . . . . . . . . . .16V
Collector-to-Base Voltage (VCBO) . . . . . . . . . . . . . . . . . . . . . . . 20V
Collector-to-Substrate Voltage (VCIO, Note 1). . . . . . . . . . . . . . 20V
Emitter-to-Base Voltage (VEBO) . . . . . . . . . . . . . . . . . . . . . . . . . 5V
Collector Current (IC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA
Base Current (IB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Thermal Information
Thermal Resistance (Typical, Note 2)
θJA (oC/W) θJC (oC/W)
CERDIP Package. . . . . . . . . . . . . . . . . 115
45
PDIP Package . . . . . . . . . . . . . . . . . . . 100
N/A
SOIC Package . . . . . . . . . . . . . . . . . . . 190
N/A
Maximum Power Dissipation (Any One Transistor) . . . . . . . 500mW
Maximum Junction Temperature (Ceramic Package) . . . . . . . . .175oC
Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. The collector of each transistor of the CA3081 and CA3082 is isolated from the substrate by an integral diode. The substrate must be connected
to a voltage which is more negative than any collector voltage in order to maintain isolation between transistors and provide normal transistor
action. To avoid undesired coupling between transistors, the substrate terminal (5) should be maintained at either DC or signal (AC) ground. A
suitable bypass capacitor can be used to establish a signal ground.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications For Equipment Design at TA = 25oC
PARAMETER
SYMBOL
TEST CONDITIONS
Collector-to-Base Breakdown Voltage
Collector-to-Substrate Breakdown Voltage
Collector-to-Emitter Breakdown Voltage
Emitter-to-Base Breakdown Voltage
V(BR)CBO
V(BR)CIO
V(BR)CEO
V(BR)EBO
IC = 500µA, IE = 0
IC = 500µA, IB = 0
IC = 1mA, IB = 0
IC = 500µA
DC Forward Current Transfer Ratio
Base-to-Emitter Saturation Voltage (Figure 4)
Collector-to-Emitter Saturation Voltage
CA3081, CA3082
CA3081 (Figure 5)
CA3082 (Figure 5)
Collector Cutoff Current
hFE
VBESAT
VCESAT
ICEO
VCE = 0.5V, IC = 30mA
VCE = 0.8V, IC = 50mA
IC = 30mA, IB = 1mA
IC = 30mA, IB = 1mA
IC = 50mA, IB = 5mA
IC = 50mA, IB = 5mA
VCE = 10V, IB = 0
Collector Cutoff Current
ICBO
VCB = 10V, IE = 0
Typical Read - Out Driver Applications
VP
0V
MIN
TYP
MAX UNITS
20
60
-
V
20
60
-
V
16
24
-
V
5.0
6.9
-
V
30
68
-
-
40
70
-
-
-
0.87
1.2
V
-
0.27
0.5
V
-
0.4
0.7
V
-
0.4
0.8
V
-
-
10
µA
-
-
1.0
µA
V+
1/7 CA3082
(COMMON COLLECTOR)
R (NOTE)
FROM
DECODER
V+
1 SEGMENT OF INCANDESCENT DISPLAY
(DR2000 SERIES OR EQUIVALENT)
1/7 CA3081
(COMMON EMITTER)
FIGURE 1. SCHEMATIC DIAGRAM SHOWING ONE
TRANSISTOR OF THE CA3081 DRIVING ONE
SEGMENT OF AN INCANDESCENT DISPLAY
LIGHT EMITTING DIODE (LED)
40736R
NOTE: The Resistance for R is determined by the relationship:
R = V-----P-----–----V----B-I--(-E-L----E–----DV-----)F---(---L---E----D-----)
R = 0 for VP = VBE + VF(LED)
Where: VP = Input Pulse Voltage
VF = Forward Voltage Drop Across the Diode
FIGURE 2. SCHEMATIC DIAGRAM SHOWING ONE
TRANSISTOR OF THE CA3082 DRIVING A LIGHT
EMITTING DIODE (LED)
2
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