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HC55130IB96 Просмотр технического описания (PDF) - Renesas Electronics

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HC55130IB96
Renesas
Renesas Electronics Renesas
HC55130IB96 Datasheet PDF : 36 Pages
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DATASHEET
HC55120, HC55121, HC55130, HC55140, HC55142, HC55143, HC55150
Low Power UniSLIC14 Family
NOT RECOMMENDED FOR NEW DESIGNS
NO RECOMMENDED REPLACEMENT
contact our Technical Support Center at
The UniSLIC14 is a family of Ultra Low Power SLICs. The 1-888-INFTeEaRtuSIrLesor www.intersil.com/tsc
feature set and common pinouts of the UniSLIC14 family
positions it as a universal solution for: Plain Old Telephone
• Ultra Low Active Power (OHT) < 60mW
Service (POTS), PBX, Central Office, Loop Carrier, Fiber in
• Single/Dual Battery Operation
the Loop, ISDN-TA and NT1+, Pairgain and Wireless Local
• Automatic Silent Battery Selection
FN4659
Rev 13.00
June 1, 2006
Loop.
• Power Management/Shutdown
The UniSLIC14 family achieves its ultra low power operation
• Battery Tracking Anti Clipping
through: Its automatic single and dual battery selection (based
on line length) and battery tracking anti clipping to ensure the
maximum loop coverage on the lowest battery voltage. This
architecture is ideal for power critical applications such as
ISDN NT1+, Pairgain and Wireless local loop products.
• Single 5V Supply with 3V Compatible Logic
• Zero Crossing Ring Control
- Zero Voltage On/Zero Current Off
• Tip/Ring Disconnect
• Pulse Metering Capability
The UniSLIC14 family has many user programmable features.
This family of SLICs delivers a low noise, low component
count solution for Central Office and Loop Carrier universal
voice grade designs. The product family integrates advanced
pulse metering, test and signaling capabilities, and zero
crossing ring control.
The UniSLIC14 family is designed in the Intersil “Latch” free
Bonded Wafer process. This process dielectrically isolates the
active circuitry to eliminate any leakage paths as found in our
competition’s JI process. This makes the UniSLIC14 family
compliant with “hot plug” requirements and operation in harsh
outdoor environments.
• 4 Wire Loopback
• Programmable Current Feed
• Programmable Resistive Feed
• Programmable Loop Detect Threshold
• Programmable On-Hook and Off-Hook Overheads
• Programmable Overhead for Pulse Metering
• Programmable Polarity Reversal Time
• Selectable Transmit Gain 0dB/-6dB
• 2 Wire Impedance Set by Single Network
• Loop and Ground Key Detectors
• On-Hook Transmission
Block Diagram
RRLY
TRLY1
TRLY2
DT
DR
RING AND TEST
RELAY DRIVERS
ZERO CURRENT
CROSSING
RING TRIP
DETECTOR
POLARITY
REVERSAL
TIP
RING
BGND
AGND
2-WIRE
INTERFACE
VBH
VBL
VCC
BATTERY
SELECTION
AND
BIAS
NETWORK
• Common Pinout
• Pb-Free Plus Anneal Available (RoHS Compliant)
STATE
DECODER
AND
DETECTOR
LOGIC
LOOP CURRENT
DETECTOR
GKD/LOOP LENGTH
DETECTOR
LINE FEED
CONTROL
4-WIRE INTERFACE
VF SIGNAL PATH
PULSE METERING
SIGNAL PATH
C1
C2
C3
C4
C5
SHD
GKD_LVM
CRT_REV_LVM
ILIM
RSYNC_REV
ROH
CDC
RDC_RAC
RD
VTX
VRX
PTG
ZT
CH
• HC55121
- Polarity Reversal
• HC55130
- -63dB Longitudinal Balance
• HC55140
- Polarity Reversal
- Ground Start
- Line Voltage Measurement
- 2 Wire Loopback
- -63dB Longitudinal Balance
• HC55142
- Polarity Reversal
- Ground Start
- Line Voltage Measurement
- 2.2VRMS Pulse Metering
- 2 Wire Loopback
• HC55150
- Polarity Reversal
- Line Voltage Measurement
- 2.2VRMS Pulse Metering
- 2 Wire Loopback
Related Literature
SPM
• AN9871, User’s Guide for UniSLIC14 Eval Board
• AN9903, UniSLIC14 and TI TCM38C17
FN4659 Rev 13.00
June 1, 2006
Page 1 of 36

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