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LHF16J04 Просмотр технического описания (PDF) - Sharp Electronics

Номер в каталоге
Компоненты Описание
производитель
LHF16J04
Sharp
Sharp Electronics Sharp
LHF16J04 Datasheet PDF : 47 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LHFl6JO4
6
Symbol
Type
A-1
A,-‘419
INPUT
"Qo-DQ,,
INPUT/
OUTpUT
CE#
INPUT
_.
RP#
INPUT
OE#
INPUT
WE#
INPUT
WP#
INPUT
BYTE#
INPUT
RY/BY#
OPEN
DRAIN
OUTPUT
Vccw
SUPPLY
vcc
SUPPLY
GND
SUPPLY
NC
Table 1. Pin Descriptions
Name and Function
ADDRESS INPUTS: Inputs for addresses during read and write operations. Addresses are
internally latched during a write cycle.
A-,: Lower address input while BYTE# is V,,. A-, pin changes DQ, j pin while BYTE# is Vt,.
A, j-A,,: Main Block Address.
A,,-A,,: Boot and Parameter Block Address.
DATA INPUT/OUTPUTS: Inputs data and commands during CUI write cycles: outputs data
during memory array. status register and identifier code read cycles. Data pins float to high-
impedance when the chip is deselected or outputs are disabled. Data is internally latched during a
write cycle. DQs-DQ, j pins are not used while byte mode (BYTE#=V,,). Then. DQls pin
changes A-, address input.
CHIP ENABLE: Activates the device’s control logic. input buffers. decoders and sense amplifiers.
CE#-high deselects the device and reduces power consumption to standby levels.
RESET: Resets the device internal automation. RP#-high enables normal operation. When driven
low. RP# inhibits write operations which provides data protection during power transitions. Exit
from reset mode sets the device to read array mode. RP# must be V,, during power-up.
OUTPUT ENABLE: Gates the device’s outputs during a read cycle.
WRITE ENABLE: Controls writes to the CUI and array blocks. Addresses and data are latched on
the rising edge of the WE# pulse.
WRITE PROTECT: When WP# is V,,. boot blocks cannot be written or erased. When WP# is
V,,, locked boot blocks can not be written or erased. WP# is not affected parameter and main
blocks.
BYTE ENABLE: BYTE# V,, places device in byte mode (x8). All data is then input or output on
DQO-,. and DQ,., j float. BYTE# V,, places the device in word mode (x16), and turns off the A-,
input buffer.
READY/BUSY#: Indicates the status of the internal WSM. When low, the WSM is performing an
internal operation (block erase. full chip erase. word/byte write or lock-bit configuration).
RY/BY#-high Z indicates that the WSM is ready for new commands. block erase is suspended,
and word/byte write is inactive. word/byte write is suspended. or the device is in reset mode.
BLOCK ERASE. FULL CHIP ERASE. WORD/BYTE WRITE OR LOCK-BIT
CONFIGURATION POWER SUPPLY: For erasing array blocks, writing words/bytes or
configuring lock-bits. With VCCW<VCCWLK. memory contents cannot be altered. Block erase, full
chip erase, word/byte write and lock-bit configuration with an invalid V,--w (see 6.2.3 DC
Characteristics) produce spurious results and should not be attempted. Applying 12Va0.3V to
Vc-w during erase/write can only be done for a maximum of 1000 cycles on each block. V,,,
may be connected to 12V@.3V for a total of 80 hours maximum.
DEVICE POWER SUPPLY: Do not float any power pins. With V&V,,,, all write attempts to
the flash memory are inhibited. Device operations at invalid V,, voltage (see 6.2.3 DC
Characteristics) produce spurious results and should not be attempted.
GROUND: Do not float any ground pins.
NO CONNECT: Lead is not internal connected: it may be driven or floated.
Rev. 1.25

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