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LHF16J04 Просмотр технического описания (PDF) - Sharp Electronics

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LHF16J04
Sharp
Sharp Electronics Sharp
LHF16J04 Datasheet PDF : 47 Pages
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SHARP
LHF16504
3
1
1 INTRODUCTION
This
datasheet contains LH28F160BJHE-T-IL90
specifications. Section 1 provides a flash memory
overview. Sections 2. 3. 4 and 5 describe the memory
organization and functionality. Section 6 covers electrical
specifications.
1.1 Features
Key enhancements of LH28F16OBJHE-TTL90 boot block
Flash memory are:
Gingle low voltage operation
*Low power consumption
*Enhanced Suspend Capabilities
l Boot Block Architecture
Please note following:
l VCCWLK has been lowered to l.OV to support 2.7V-
3.6V block erase. full chip erase. word/byte write and
lock-bit configuration operations. The Vccw voltage
transitions to GND is recommended for designs that
switch Vccw off during read operation.
1.2 Product Overview
The LH28F160BJHE-TTL90 is a high-performance 16M-
ait Boot Block Flash memory organized as lM-word of 16
aits or 2M-byte of 8 bits. The lM-word/2M-byte of data is
u-ranged in two 4K-word/SK-byte boot blocks, six 4K-
word/8K-byte parameter blocks and thirty-one 32K-
vord/64K-byte main blocks which are individually
:rasable, lockable and unlockable in-system. The memory
nap is shown in Figure 3.
Ihe dedicated V ccw pin gives complete data protection
vhen V CCW’VCCWLK.
4 Command User Interface (CUD serves as the interface
jetween the system processor and internal operation of the
ievice. A valid command sequence written to the CUI
nitiates device automation. An internal Write State
vlachine (WSM) automatically executes the algorithms
md timings necessary for block erase, full chip erase.
vord/byte write and lock-bit configuration operations.
A block erase operation erases one of the device’s 32K-
word/6JK-byte blocks typically within 1.2s (3V Vcc. 3V
Vccw). JK-word/8K-byte blocks typically within 0.6s (3V
V,,. 3V Vccw) independent of other blocks. Each block
can be independently erased minimum 100,000 times.
Block erase suspend mode allows system software to
suspend block erase to read or write data from any other
block.
Writing memory data is performed in word/byte
increments of the device’s 32K-word blocks typically
within 33~s (3V V,,. 3V Vccw). 6JK-byte blocks
typically within 31~s (3V V,,. 3V Vccw). 4K-word
blocks typically within 36~s (3V Vcc. 3V V,,,), 8K-
byte blocks typically within 32~s (3V Vcc. 3V Vccw).
Word/byte write suspend mode enables the system to read
data or execute code from any other flash memory array
location.
Individual block locking uses a combination of bits, thirty-
nine block lock-bits. a permanent lock-bit and WP# pin. to
lock and unlock blocks. Block lock-bits gate block erase.
full chip erase and word/byte write operations. while the
permanent lock-bit pates block lock-bit modification and
locked block alternation. Lock-bit configuration
operations (Set Block Lock-Bit, Set Permanent Lock-Bit
and Clear Block Lock-Bits commands) set and cleared
lock-bits.
The status register indicates when the WSM‘s block erase,
fuli chip erase. word/byte write or lock-bit configuration
operation is finished.
The RY/BY# output gives an additional indicator of WSM
activity by providing both a hardware signal of status
(versus software polling) and status masking (interrupt
masking for background block erase, for example). Status
polling using RY/BY# minimizes both CPU overhead and
system power consumption. When low, RY/BY# indicates
that the WSM is performing a block erase. full chip erase.
word/byte write or lock-bit configuration. RY/BY#-high Z
indicates that the WSIM is ready for a new command.
block erase is suspended (and word/byte write is
inactive), word/byte write is suspended. or the device is in
reset mode.
Rev. 1.25

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