X20C04EI-25 Просмотр технического описания (PDF) - Xicor -> Intersil
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X20C04EI-25 Datasheet PDF : 15 Pages
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X20C04
DEVICE OPERATION
The CE, OE, WE and NE inputs control the X20C04
operation. The X20C04 byte-wide NOVRAM uses a
2-line control architecture to eliminate bus contention in
a system environment. The I/O bus will be in a high
impedance state when either OE or CE is HIGH, or
when NE is LOW.
RAM Operations
RAM read and write operations are performed as they
would be with any static RAM. A read operation requires
CE and OE to be LOW with WE and NE HIGH. A write
operation requires CE and WE to be LOW with NE
HIGH. There is no limit to the number of read or write
operations performed to the RAM portion of the X20C04.
Nonvolatile Operations
With NE LOW, recall operation is performed in the same
manner as RAM read operation. A recall operation
causes the entire contents of the E2PROM to be written
into the RAM array. The time required for the operation
to complete is 5µs or less. A store operation causes the
entire contents of the RAM array to be stored in the
nonvolatile E2PROM. The time for the operation to
complete is 5ms or less.
Power-Up Recall
Upon power-up (VCC), the X20C04 performs an auto-
matic array recall. When VCC minimum is reached, the
recall is initiated, regardless of the state of CE, OE, WE
and NE.
Write Protection
The X20C04 has five write protect features that are
employed to protect the contents of both the nonvolatile
memory and the RAM.
• VCC Sense—All functions are inhibited when VCC is
≤ 3.5V.
• A RAM write is required before a Store Cycle is
initiated.
• Write Inhibit—Holding either OE LOW, WE HIGH,
CE HIGH, or NE HIGH during power-up and power-
down will prevent an inadvertent store operation.
• Noise Protection—A combined WE, NE, OE and
CE pulse of less than 20ns will not initiate a Store
Cycle.
• Noise Protection—A combined WE, NE, OE and
CE pulse of less than 20ns will not initiate a recall
cycle.
SYMBOL TABLE
WAVEFORM INPUTS
OUTPUTS
Must be
steady
May change
from LOW
to HIGH
May change
from HIGH
to LOW
Don’t Care:
Changes
Allowed
N/A
Will be
steady
Will change
from LOW
to HIGH
Will change
from HIGH
to LOW
Changing:
State Not
Known
Center Line
is High
Impedance
3
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