ARM7TDMI Просмотр технического описания (PDF) - Unspecified
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ARM7TDMI Datasheet PDF : 284 Pages
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Contents
Chapter 7
Appendix A
Appendix B
6.14 Coprocessor data transfer from memory to coprocessor .......................... 6-21
6.15 Coprocessor data transfer from coprocessor to memory .......................... 6-23
6.16 Coprocessor register transfer, load from coprocessor .............................. 6-25
6.17 Coprocessor register transfer, store to coprocessor ................................. 6-26
6.18 Undefined instructions and coprocessor absent ....................................... 6-27
6.19 Unexecuted instructions ............................................................................ 6-28
6.20 Instruction speed summary ....................................................................... 6-29
AC and DC Parameters
7.1 Timing diagram information ......................................................................... 7-3
7.2 General timing ............................................................................................. 7-4
7.3 Address bus enable control ........................................................................ 7-6
7.4 Bidirectional data write cycle ....................................................................... 7-7
7.5 Bidirectional data read cycle ....................................................................... 7-8
7.6 Data bus control .......................................................................................... 7-9
7.7 Output 3-state timing ................................................................................. 7-10
7.8 Unidirectional data write cycle timing ........................................................ 7-11
7.9 Unidirectional data read cycle timing ........................................................ 7-12
7.10 Configuration pin timing ............................................................................ 7-13
7.11 Coprocessor timing ................................................................................... 7-14
7.12 Exception timing ........................................................................................ 7-15
7.13 Synchronous interrupt timing .................................................................... 7-16
7.14 Debug timing ............................................................................................. 7-17
7.15 Debug communications channel output timing ......................................... 7-19
7.16 Breakpoint timing ...................................................................................... 7-20
7.17 Test clock and external clock timing ......................................................... 7-21
7.18 Memory clock timing ................................................................................. 7-22
7.19 Boundary scan general timing .................................................................. 7-23
7.20 Reset period timing ................................................................................... 7-24
7.21 Output enable and disable times .............................................................. 7-25
7.22 Address latch enable control ..................................................................... 7-26
7.23 Address pipeline control timing ................................................................. 7-27
7.24 Notes on AC Parameters .......................................................................... 7-28
7.25 DC parameters .......................................................................................... 7-34
Signal Description
A.1 Signal description ........................................................................................ A-2
Debug in Depth
B.1 Scan chains and JTAG interface ................................................................ B-3
B.2 Resetting the TAP controller ....................................................................... B-6
B.3 Pullup resistors ........................................................................................... B-7
B.4 Instruction register ...................................................................................... B-8
B.5 Public instructions ....................................................................................... B-9
B.6 Test data registers .................................................................................... B-14
B.7 The ARM7TDMI core clocks ..................................................................... B-22
ARM DDI 0029G
Copyright © 1994-2001. All rights reserved.
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