LC786960E Просмотр технического описания (PDF) - SANYO -> Panasonic
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LC786960E Datasheet PDF : 24 Pages
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Pin
Pin name
No.
State when
I/O
"Reset"
82 JTRSTB
I
Input
83 JTCK
I
Input
84 JTDI
I
Input
85 JTMS
86 JTDO
87 JTRTCK
88 DVDD
89 DVSS
90 DVDD15
91 XVSS2
92 X16OUT
93 X16IN
94 XVDD2
95 LRVDD
96 LCHO
97 LRREF
98 RCHO
99 LRVSS
100 SLCO
I
Input
O
Low
O
Low
-
-
-
-
AO
High
-
-
O
Oscillation
I
Oscillation
-
-
-
-
AO
LRVDD/2
AO
LRVDD/2
AO
LRVDD/2
-
-
AO
Undefined
LC786960E
Function
JTAG reset input
(Connect to pll-down resister or 0V level in normal mode.)
JTAG clock input
(Connect to pll-down resister or 0V level in normal mode.)
JTAG data input
(Connect to pll-down resister or 0V level in normal mode.)
JTAG mode input
(Connect to pll-up resister or DVDD level in normal mode.)
JTAG data output (Leave open in normal mode.)
JTAG return clock output (Leave open in normal mode.)
Digital system power supply
Digital system ground. This pin must be connected to the 0V level.
Capacitor connection pin for internal regulator
Oscillator ground. This pin must be connected to the 0V level.
16.9344MHz oscillator connection
16.9344MHz oscillator connection
Oscillator power supply
Audio LPF power supply
Audio Lch data output
Reference voltage for audio LPF
Audio Rch data output
Audio LPF ground. This pin must be connected to the 0V level.
Slice Level Control output
<Note>
(1) For unused pins:
The unused input pins must be connected to the GND (0V) level if there is no individual note in the above table.
The unused output pins must be left open (No connection) if there is no individual note in the above table.
The unused input/output pins must be connected to the GND (0V) or power supply pin for I/O block with internal
pull down resistor OFF or be left open with internal pull down resistor ON when input pin mode or must be left
open (No connection) when output pin mode if there is no individual note in the above table.
When you connect an I/O pin which is an input pin without internal pull-down resistor at reset mode to the GND
or power supply level, we recommend you to use pull-down resistor or pull-up resistor individually as fail-safe.
(2) For power supply pins:
Same voltage level must be supplied to DVDD, AVDD, XVDD1, XVDD2, VVDD1, VVDD2, VVDD3, UVDD
and LRVDD power supply pins.
(Refer to“Allowable operating ranges”.)
(3) For “Reset” condition:
This LSI is not reset only by making the RESB pin “Low”.
Refer to “Power on and Reset control” for detail of “Reset” condition.
No.A2080-10/24
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