DJLXT908LC Просмотр технического описания (PDF) - Intel

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DJLXT908LC

Universal 3.3V 10BASE-T and AUI Transceiver

Intel 

Contents

Contents

1.0

Pin Assignments and Signal Descriptions...................................................... 8

2.0

Functional Description........................................................................................... 11

2.1 Introduction.......................................................................................................... 11

2.1.1 Controller Compatibility Modes .............................................................. 11

2.1.2 Transmit Function................................................................................... 12

2.1.3 Jabber Control Function ......................................................................... 12

2.1.4 Receive Function.................................................................................... 13

2.1.5 SQE Function ......................................................................................... 13

2.1.6 Polarity Reverse Function ...................................................................... 14

2.1.7 Loopback Function ................................................................................. 14

2.1.8 Collision Detection Function................................................................... 15

2.1.9 Link Pulse Transmission ........................................................................ 16

2.1.10 Link Integrity Test Function .................................................................... 16

3.0

Application Information......................................................................................... 18

3.1 External Components.......................................................................................... 18

3.1.1 Crystal Information ................................................................................. 18

3.1.2 Magnetic Information.............................................................................. 18

3.2 Layout Requirements .......................................................................................... 18

3.2.1 Auto Port Select with External Loopback Control................................... 18

3.2.2 Full Duplex Support................................................................................ 20

3.2.3 Dual Network Support-10Base T and Token Ring ................................. 21

3.2.4 Manual Port Select & Link Test Function ............................................... 22

3.2.5 Three Media Application......................................................................... 24

3.2.6 AUI Encoder/Decoder Only .................................................................... 25

4.0

Test Specifications .................................................................................................. 26

4.1 Timing Diagrams for Mode 1 (MD2, 1, 0 = Low, Low, Low) Figures 16 - 21 ....... 30

4.2 Timing Diagrams for Mode 2 (MD2, 1, 0 = Low, Low, High) Figures 22 - 27 ...... 32

4.3 Timing Diagrams for Mode 3 (MD2, 1, 0 = Low, High, Low) Figures 28 - 33 ...... 34

4.4 Timing Diagrams for Mode 4 (MD2, 1, 0 = Low, High, High) Figures 34 - 39 ..... 36

4.5 Timing Diagrams for Mode 5 (MD2, 1, 0 = High, High, Low) Figures 40 - 45 ..... 38

5.0

Mechanical Specifications.................................................................................... 40

A

Ordering Information .............................................................................................. 43

Datasheet

3

Document #: 249049

Revision #: 002

Rev. Date: June 19, 2001

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