M34551E8-XXXFP_98 Просмотр технического описания (PDF) - MITSUBISHI ELECTRIC

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Компоненты Описание

производитель

M34551E8-XXXFP_98

4-BIT SINGLE-CHIP MICROCOMPUTER

MITSUBISHI ELECTRIC  

List of figures

List of figures

CHAPTER 1 HARDWARE

Fig. 1 AMC instruction execution example ............................................................................... 1-10

Fig. 2 RAR instruction execution example ............................................................................... 1-10

Fig. 3 Registers A, B and register E ........................................................................................ 1-10

Fig. 4 TABP p instruction execution example .......................................................................... 1-10

Fig. 5 Stack registers (SKs) structure ....................................................................................... 1-11

Fig. 6 Example of operation at subroutine call ....................................................................... 1-11

Fig. 7 Program counter (PC) structure ..................................................................................... 1-12

Fig. 8 Data pointer (DP) structure ............................................................................................. 1-12

Fig. 9 SD instruction execution example .................................................................................. 1-12

Fig. 10 ROM map of M34551E8 ................................................................................................ 1-13

Fig. 11 Interrupt address page (addresses 008016 to 00FF16) structure ............................ 1-13

Fig. 12 RAM map ......................................................................................................................... 1-14

Fig. 13 Program example of interrupt processing ................................................................... 1-16

Fig. 14 Internal state when interrupt occurs ............................................................................ 1-16

Fig. 15 Interrupt system diagram ............................................................................................... 1-16

Fig. 16 Interrupt sequence .......................................................................................................... 1-17

Fig. 17 External interrupt circuit structure ................................................................................ 1-18

Fig. 18 Auto-reload function ....................................................................................................... 1-20

Fig. 19 Timers structure .............................................................................................................. 1-21

Fig. 20 Watchdog timer function ................................................................................................ 1-24

Fig. 21 Program example to enter the RAM back-up mode when using the watchdog timer .... 1-24

Fig. 22 Carrier wave selection register ..................................................................................... 1-25

Fig. 23 Carrier wave output auto-control by timer 1 .............................................................. 1-27

Fig. 24 LCD clock control circuit structure ............................................................................... 1-28

Fig. 25 LCD controller/driver structure ...................................................................................... 1-29

Fig. 26 LCD RAM map ................................................................................................................ 1-30

Fig. 27 LCD controller/driver structure ...................................................................................... 1-31

Fig. 28 Reset release timing ...................................................................................................... 1-32

Fig. 29 RESET pin input waveform and reset operation ....................................................... 1-32

Fig. 30 Power-on reset circuit example .................................................................................... 1-32

Fig. 31 Internal state at reset .................................................................................................... 1-33

Fig. 32 Voltage drop detection reset circuit ............................................................................. 1-34

Fig. 33 Voltage drop detection circuit operation waveform .................................................... 1-34

Fig. 34 Set source and clear source of the P flag ................................................................. 1-36

Fig. 35 Start condition identified example using the SNZP instruction .............................. 1-36

Fig. 36 State transition ................................................................................................................ 1-37

Fig. 37 Clock control circuit structure ....................................................................................... 1-38

Fig. 38 Ceramic resonator external circuit ............................................................................... 1-39

Fig. 39 Quartz-crystal oscillator external circuit ...................................................................... 1-39

Fig. 40 External 0 interrupt program example ......................................................................... 1-40

Fig. 41 Pin configuration of built-in PROM version ................................................................ 1-64

Fig. 42 PROM memory map ....................................................................................................... 1-65

Fig. 43 Flow of writing and test of the product shipped in blank ......................................... 1-65

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4551 Group User’s Manual

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