L9826_02 Просмотр технического описания (PDF) - STMicroelectronics
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L9826_02 Datasheet PDF : 12 Pages
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L9826
APPLICATION INFORMATION
The typical application diagram is shown in Fig. 5.
Figure 5. Typical Application Circuit Diagram for the L9826 Circuit.
µP
VCC
VOLTAGE
REGULATOR
VCC
VCC
NON1
1
3
2
S Latch / Driver
IO L
Q1
R
NON2
NCS
Diag1
VCC
Q2
Diag2
VCC
CLK
VCC
S DI
SDO
VCC
VCC
Fault Latch
Overtemperature Detection
+
-
VD G
CH1
CH2
Q1
Q2
Q3
Q4
Q3
Q5
Q6
Q7
Q8
Diag1 Diag3
Diag2
Diag3
Diag4 Q4
Diag5 Diag4
Diag6
Diag7
Diag8
Q5
Diag5
Q6
Diag6
S
Latch / Driver
R
IO L
+
-
VDG CH3
CH4
CH5
CH6
nR ES
Reset
VCC
Reset
Q7
Diag7
Undervoltage
RE SET
L9826
Q8
Diag8
GND
CH7
CH8
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
R, L loads
VBAT
L9826
For higher current driving capability two outputs of the same kind can be paralleled. In this case the maximum
flyback energy should not exceed the limit value for single output.
The immunity of the circuit with respect to the transients at the output is verified during the characterization for
Test Pulses 1, 2 and 3a, 3b, DIN40839 or ISO7637 part 3. The Test Pulses are coupled to the outputs with
200pF series capacitor. All outputs withstand testpulses without damage.
The correct function of the circuit with the Test Pulses coupled to the outputs is verified during the characteriza-
tion for the typical application with R = 30Ω to 100Ω, L= 0 to 600mH loads. The Test Pulses are coupled to the
outputs with 200pF series capacitor.
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