CL1K30FC256-1 Просмотр технического описания (PDF) - Clear Logic
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CL1K30FC256-1 Datasheet PDF : 16 Pages
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LIBERATOR CL1K30 (PRELIMINARY)
AC Electrical Specifications cont.
Interconnect Timing Parameters[5]
Symbol
Parameter
Speed: -1
Min Max
tDIN2IOE
Delay from Dedicated Input Pin to IOE
Control Input
4.1
tDIN2LE
Delay from Dedicated Input Pin to LE or EAB
Control Input
0.9
tDIN2DATA
Delay from Dedicated Input or Clock Pin to
LE or EAB Data
1.8
tDCLK2IOE Delay from Dedicated Clock Pin to IOE Clock
3.9
tDCLK2LE
Delay from Dedicated Clock Pin to LE or EAB
Clock
0.9
tSAMELAB Delay from an LE to LE in Same LAB
0.1
Speed: -2
Min Max
4.6
1.0
1.9
4.6
1.0
0.1
Speed: -3
Min Max Unit
5.9
ns
1.3
ns
2.3
ns
6.2
ns
1.3
ns
0.2
ns
tSAMEROW
Delay for Driving a Row IOE, LE or EAB to a
Row IOE, LE or EAB in the Same Row
1.3
1.3
1.8
ns
tSAMECOLUMN
Delay from
Column
an
LE
to
IOE
in
the
Sam e
0.7
0.8
1.5
ns
tDIFFROW
Delay for Driving a Column IOE, LE or EAB to
an LE or EAB in a Different Row
2.0
2.1
3.3
ns
tTWOROWS
Delay for Driving a Row IOE or EAB to an LE
or EAB in a Different Row
3.3
3.4
5.1
ns
tLEPERIPH
Delay from an LE to IOE Control Signal via
the Peripheral Dontol Bus
3.8
4.1
5.3
ns
tLABCARRY
Delay from an LE Carry-out Signal to an LE
Carry-in Signal in a Different LAB
0.1
0.1
0.2
ns
tLABCASC
Delay from an LE Cascade-out Signal to an
LE Cascade-in Signal in a Different LAB
0.3
0.3
0.5
ns
1K tbl 09A
Page 11
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