FM24CL64B_13 Просмотр технического описания (PDF) - Cypress Semiconductor
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FM24CL64B_13 Datasheet PDF : 13 Pages
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FM24CL64B - Automotive Temp.
AC Parameters (TA = -40 C to + 125 C, VDD =3.0V to 3.6V unless otherwise specified)
Symbol Parameter
Min Max Min Max Min Max
fSCL
tLOW
tHIGH
tAA
SCL Clock Frequency
Clock Low Period
Clock High Period
SCL Low to SDA Data Out Valid
0 100 0 400 0 1000
4.7
1.3
0.6
4.0
0.6
0.4
3
0.9
0.55
Units
kHz
s
s
s
Notes
1
tBUF
Bus Free Before New
Transmission
4.7
1.3
0.5
s
tHD:STA Start Condition Hold Time
4.0
0.6
0.25
s
tSU:STA Start Condition Setup for Repeated 4.7
0.6
0.25
s
Start
tHD:DAT
tSU:DAT
tR
Data In Hold
Data In Setup
Input Rise Time
0
0
0
ns
250
100
100
ns
1000
300
300 ns
2
tF
Input Fall Time
300
300
100 ns
2
tSU:STO Stop Condition Setup
4.0
0.6
0.25
s
tDH
Data Output Hold
0
0
0
ns
(from SCL @ VIL)
tSP
Noise Suppression Time Constant
50
50
50 ns
on SCL, SDA
Notes: All SCL specifications as well as start and stop conditions apply to both read and write operations.
1. The speed-related specifications are guaranteed characteristic points along a continuous curve of operation from DC to fSCL
(max).
2. This parameter is periodically sampled and not 100% tested.
Capacitance (TA = 25 C, f=1.0 MHz, VDD = 3.3V)
Symbol Parameter
Min
CI/O
Input/Output Capacitance (SDA)
-
CIN
Input Capacitance
-
Notes
1. This parameter is periodically sampled and not 100% tested.
Max Units Notes
8
pF
1
6
pF
1
Power Cycle Timing
VDD
VDD min.
tVR
tPU
tVF
tPD
SDA,SCL
Power Cycle Timing (TA = -40 C to +125 C, VDD = 3.0V to 3.6V)
Symbol Parameter
tPU
Power Up (VDD min) to First Access (Start condition)
tPD
Last Access (Stop condition) to Power Down (VDD min)
tVR
VDD Rise Time
tVF
VDD Fall Time
Notes
1. Slope measured at any point on VDD waveform.
Document Number: 001-84457 Rev. *A
Min Max Units Notes
1
-
ms
0
-
s
30
-
s/V
1
20
-
s/V
1
Page 9 of 13
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