HEF4053B Просмотр технического описания (PDF) - NXP Semiconductors.
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HEF4053B Datasheet PDF : 19 Pages
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Nexperia
HEF4053B
Triple single-pole double-throw analog switch
10.1 Test circuits
9''
9''RU966
9''
6WR6 Q<
VZLWFK
,6
Q=
(
Q<
966 9((
92
9,
Fig 8. Test circuit for measuring OFF-state leakage current Z port
DDM
9''
9''RU966
966
6WR6 Q<
Q=
Q<
VZLWFK
,6
(
966 9((
9,
92
DDM
Fig 9. Test circuit for measuring OFF-state leakage current nYn port
10.2 ON resistance
Table 7. ON resistance
Tamb = 25 C; ISW = 200 A; VSS = VEE = 0 V.
Symbol Parameter
Conditions
RON(peak) ON resistance (peak)
VI = 0 V to VDD VEE;
see Figure 10 and Figure 11
VDD VEE
Typ
5V
350
10 V
80
15 V
60
RON(rail) ON resistance (rail)
VI = 0 V; see Figure 10 and Figure 11 5 V
115
10 V
50
15 V
40
VI = VDD VEE;
5V
120
see Figure 10 and Figure 11
10 V
65
15 V
50
RON
ON resistance mismatch VI = 0 V to VDD VEE; see Figure 10 5 V
25
between channels
10 V
10
15 V
5
Max Unit
2500
245
175
340
160
115
365
200
155
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HEF4053B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 25 March 2016
© Nexperia B.V. 2017. All rights reserved
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