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ADE7755AN-REF Просмотр технического описания (PDF) - Analog Devices

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ADE7755AN-REF
ADI
Analog Devices ADI
ADE7755AN-REF Datasheet PDF : 16 Pages
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ADE7755
Pin No. Mnemonic
21
DGND
22
23, 24
CF
F2, F1
Description
This provides the ground reference for the digital circuitry in the ADE7755, i.e., multiplier, filters, and
digital-to-frequency converter. This pin should be tied to the digital ground plane of the PCB. The
digital ground plane is the ground reference for all digital circuitry, e.g., counters (mechanical and
digital), MCUs, and indicator LEDs. For good noise suppression, the analog ground plane should
only be connected to the digital ground plane at one point only, e.g., a star ground.
Calibration Frequency Logic Output. The CF logic output gives instantaneous real power informa-
tion. This output is intended to be used for calibration purposes. Also see SCF Pin description.
Low Frequency Logic Outputs. F1 and F2 supply average real power information. The logic outputs
can be used to directly drive electromechanical counters and two phase stepper motors. See Transfer
Function section.
TERMINOLOGY
MEASUREMENT ERROR
The error associated with the energy measurement made by the
ADE7755 is defined by the following formula:
Percentage
Error
=
Energy
Registered
by the ADE7755
True Energy
– True
Energy
¥ 100%
PHASE ERROR BETWEEN CHANNELS
The HPF (High-Pass Filter) in Channel 1 has a phase lead
response. To offset this phase response and equalize the phase
response between channels, a phase correction network is also
placed in Channel 1. The phase correction network matches the
phase to within ± 0.1over a range of 45 Hz to 65 Hz and ± 0.2
over a range 40 Hz to 1 kHz. See Figures 4 and 5.
POWER SUPPLY REJECTION
This quantifies the ADE7755 measurement error as a percent-
age of the reading when the power supplies are varied.
For the ac PSR measurement, a reading at nominal supplies
(5 V) is taken. A 200 mV rms/100 Hz signal is then introduced
onto the supplies and a second reading obtained under the same
input signal levels. Any error introduced is expressed as a
percentage of the reading (see Measurement Error definition).
For the dc PSR measurement, a reading at nominal supplies
(5 V) is taken. The supplies are then varied ± 5% and a second
reading is obtained with the same input signal levels. Any error
introduced is again expressed as a percentage of the reading.
ADC OFFSET ERROR
This refers to the dc offset associated with the analog inputs to
the ADCs. It means that with the analog inputs connected to
AGND, the ADCs still see a small dc signal (offset). The offset
decreases with increasing gain in Channel V1. This specification
is measured at a gain of 1. At a gain of 16, the dc offset is typi-
cally less than 1 mV. However, when the HPF is switched on,
the offset is removed from the current channel and the power
calculation is not affected by this offset.
GAIN ERROR
The gain error of the ADE7755 is defined as the difference between
the measured output frequency (minus the offset) and the ideal
output frequency. It is measured with a gain of 1 in Channel V1.
The difference is expressed as a percentage of the ideal frequency.
The ideal frequency is obtained from the ADE7755 transfer
function (see Transfer Function section).
GAIN ERROR MATCH
The gain error match is defined as the gain error (minus the off-
set) obtained when switching between a gain of 1 and a gain of 2,
8, or 16. It is expressed as a percentage of the output frequency
obtained under a gain of 1. This gives the gain error observed
when the gain selection is changed from 1 to 2, 8, or 16.
–6–
REV. 0

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