5L35021 Просмотр технического описания (PDF) - Integrated Device Technology

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5L35021

VersaClock® 3S Programmable Clock Generator

Integrated Device Technology 

5L35021 Datasheet

Table 9. Electrical Characteristics – LPHCSL Differential Outputs (Cont.)

Symbol

Parameter

Minimum

Typical

Maximum Units

Notes

ΔVCROSS

Jitter-Cy/Cy

Crossing Voltage Variation

Cycle to Cycle Jitter

140

mV

1,5,9

160

ps

1,2

Jitter-STJ

Short Term Period Jitter

300

ps

1,2

TDC

Duty Cycle

45

55

%

1,2

1 Guaranteed by design and characterization, not 100% tested in production.

2 Measured from differential waveform.

3 Slew rate is measured through the VSWING voltage range centered around differential 0V. This results in a ±150mV window around differential 0V.

4 VCROSS is defined as voltage where Clock = Clock# measured on a component test board and only applies to the differential rising edge (i.e. Clock

rising and Clock# falling).

5 The total variation of all VCROSS measurements in any particular system. Note that this is a subset of VCROSS min/max (VCROSS absolute) allowed.

The intent is to limit VCROSS induced modulation by setting ΔVCROSS to be smaller than VCROSS absolute.

6 Measured from single-ended waveform.

7 Measured with scope averaging off, using statistics function. Variation is the difference between minimum and maximum.

8 Scope average on.

9 100MHz, spread off and 0.5% spread.

©2017 Integrated Device Technology, Inc.

8

July 13, 2017

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