SI3454 Просмотр технического описания (PDF) - Silicon Laboratories

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SI3454

QUAD IEEE 802.3AT POE PSE CONTROLLER

Silicon Laboratories 

Si3454

Table 1. PSE Port Interface Recommended Operating Conditions1 (Continued)

Parameter

Symbol

Test Condition

Min Typ Max Unit

Power Supply Currents3

VPWR Supply Current

VDD Supply Current

Detection Specification

IVPWR

IDD

During normal operation

—

2

5 mA

—

18

25 mA

Detection Voltage

when RDET = 25.5k

VPORTn

Primary detection voltage

— –4.0 –2.8 V

Secondary detection voltage –10 –8.0 —

V

Detection Current Limit

Minimum Signature

Resistance @ PD

IDET

Measured when VPORTn = 0 V —

3

4.9 mA

RDET_MIN

15

—

19 k

Maximum Signature

Resistance @ PD

RDET_MAX

26.5 —

33 k

Shorted Port Threshold

Open Port Threshold

Classification Specifications

RSHORT

ROPEN

150

—

400 

100

—

400 k

Classification Voltage

Classification Current

VCLASS

ICLASS

0 mA < ICLASS < 45 mA

–20.5 — –15.5 V

Measured when VPORTn = 0 V 55

—

95 mA

Class 0

0

—

5 mA

Class 1

8

—

13 mA

Classification Current Region ICLASS_REGION

Class 2

Class 3

16

—

21 mA

25

—

31 mA

Class 4

35

—

45 mA

Notes:

1. Port voltages are referenced with respect to VPWR. All other voltages are referenced with respect to GND. These

specifications apply over the recommended operating voltage and temperature ranges of the device unless noted

otherwise. Typical performance is for TA = 25 °C, VDD = AGND + 3.3 V, AGND and DGND = 0 V, and VPWR at 48 V.

2. For a description of the detailed behavior of VDD UVLO, see “4.2.2. Global Event Register and Global Event COR

(0x02, 0x03)” .

3. Positive values indicate currents flowing into the device; negative currents indicate current flowing out of the device.

Rev. 1.1

5

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