ISP1583 Просмотр технического описания (PDF) - NXP Semiconductors.

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Компоненты Описание

производитель

ISP1583

Hi-Speed USB peripheral controller

NXP Semiconductors. 

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to or from USB

DP DM

34

VBUS

55

12 MHz

XTAL1 XTAL2

58

57

3.3 V

1.5 kΩ

RPU 2

SoftConnect

ISP1583

CS1_N DA1(2) DREQ DIOR

CS0_N DA0(3) DA2 DACK DIOW

DMA

HANDLER

21 22 62 60 17 9 10 11 12

8

14

DMA INTERFACE

15

EOT

INTRQ

IORDY(1)

RREF 6

12 kΩ

HI-SPEED USB

TRANSCEIVER

NXP

SIE/PIE

MEMORY

MANAGEMENT

UNIT

DMA

REGISTERS

RESET_N

VCC(3V3)

7

POWER-ON

RESET

internal

reset

analog

supply

61

VOLTAGE 1.8 V digital

SYSTEM

REGULATORS

supply CONTROLLER

13, 35, 59

1, 5 32, 56

64

63

INTEGRATED

RAM (8 kB)

MICRO-

CONTROLLER

HANDLER

I/O pad supply

26, 41, 54

OTG SRP

MODULE

DGND AGND VCC1V8 SUSPEND WAKEUP

VCC(I/O)

37 to 40, 16

42 to 53

62

60

34

23 to 25,

27 to 31 8

18

MICROCONTROLLER

36

INTERFACE

19

20

15

16

DATA[15:0]

BUS_CONF(3)

MODE0(2)

MODE1

AD[7:0]

CS_N

ALE / A 0

R W _ N / RD_N

DS_N/ WR_N

READY(1)

INT

004aaa268

The figure shows the ISP1583BS pinout. For the ISP1583ET, ISP1583ET1 and ISP1583ET2 ballouts, see Table 3.

The direction of pins DREQ, DACK, DIOR and DIOW is determined by bit MASTER (DMA Hardware register) and bit ATA_MODE (DMA Configuration register).

(1) Pin 15 is shared by READY and IORDY.

(2) Pin 60 is shared by MODE0 and DA1.

(3) Pin 62 is shared by BUS_CONF and DA0.

Fig 1. Block diagram

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