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LTC1550L

Low Noise, Switched Capacitor Regulated Voltage Inverters

Linear Technology 

LTC1550L/LTC1551L

APPLICATIONS INFORMATION

The LTC1550L/LTC1551L consist of two major blocks

(see Block Diagram): an inverting charge pump and a

negative linear regulator. The charge pump uses two

external capacitors, C1 and CCP to generate a negative

voltage at CPOUT. It operates by charging and discharging

C1 on alternate phases of the internal 900kHz clock. C1 is

initially charged to VCC through switches S1 and S3. When

the internal clock changes phase, S1 and S3 open and S2

and S4 close, shorting the positive side of C1 to ground.

This forces the negative side of C1 below ground, and

charge is transferred to CCP through S4. As this cycle

repeats, the magnitude of the negative voltage approaches

VCC. The 900kHz internal clock frequency helps keep noise

out of the 400kHz to 600kHz IF bands commonly used by

portable radio frequency systems and reduces the size of

the external capacitors required. Most applications can

use standard 0.1µF ceramic capacitors for C1 and CCP.

Increasing C1 and CCP beyond 0.1µF has little effect on the

output ripple or the output current capacity of the

LTC1550L/LTC1551L.

The negative voltage at CPOUT supplies the input to the

negative regulator block. This block consists of an

N-channel MOSFET pass device and a feedback amplifier

that monitors the output voltage and compares it to the

internal reference. The regulated output appears at the

VOUT pin. The regulation loop is optimized for fast tran-

sient response, enabling it to remove most of the switch-

ing artifacts present at the CPOUT pin. Output ripple is

typically below 1mVP-P with output loads between 0mA

and 10mA. The output voltage is set by a pair of internal

divider resistors for the fixed voltage versions. The N-

channel pass device minimizes dropout, allowing the

output to remain in regulation with supply voltages as low

as 2.7V for an output voltage of –2V. An output capacitor

of at least 4.7µF from VOUT to ground is required to keep

the regulator loop stable; for optimum stability and mini-

mum output ripple, at least 10µF is recommended.

Adjustable Hook-Up

For the adjustable LTC1550L/LTC1551L, the output volt-

age is set with a resistor divider from GND to VOUT

(Figure␣ 2). Note that the internal reference and the internal

feedback amplifier are set up as a positive-output regula-

tor referenced to the VOUT pin, not as a negative regulator

PGND, AGND

R1

LTC1550L ADJ

VOUT

R2

( ) R1 + R2

VOUT = –1.225V R2

1550L/51L • F02

Figure 2. External Resistor Connections

referenced to ground. The output resistor divider must be

set to provide 1.225V at the ADJ pin with respect to VOUT.

For example, a – 3V output would require a 17.4k resistor

from GND to ADJ, and a 12.1k resistor to VOUT.

CAPACITOR SELECTION

The LTC1550L/LTC1551L requires four external capaci-

tors: an input bypass capacitor, two 0.1µF charge pump

capacitors and an output filter capacitor. The overall

behavior of the LTC1550L/LTC1551L is strongly affected

by how the capacitors are used, and by how the capacitors

are laid out on the printed circuit board (PCB). In particu-

lar, the output capacitor’s value and ESR have a significant

effect on the output ripple and noise performance. In

addition, the ground connections for the VCC bypass

capacitor, the CPOUT capacitor and the VOUT bypass ca-

pacitor must employ star-ground techniques at the GND

pin of the LTC1550L/LTC1551L. Proper capacitor selec-

tion is critical for optimum performance of the LTC1550L/

LTC1551L.

Output Ripple vs Output Capacitor

Figure 4 shows the effect of using different output capaci-

tor values on the LTC1550L/LTC1551L output ripple.

These curves are taken using the LTC1551L circuit in

Figure 3, with CIN = 2.2µF and ILOAD = 5mA. The upper

curve shows the performance with a standard tantalum

capacitor alone and the lower curve shows that of the

tantalum capacitor in parallel with a 0.1µF ceramic capaci-

tor. As a general rule, larger output capacitors provide

lower output ripple. To keep output voltage ripple below

1mVP–P, 10µF, or greater, in parallel with a 0.1µF ceramic

capacitor is required. To guarantee loop stability under all

conditions, a minimum of 4.7µF is required at the output.

8

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