N25Q128A23B1240F Просмотр технического описания (PDF) - Numonyx -> Micron

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производитель

N25Q128A23B1240F

128-Mbit 3 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface

Numonyx -> Micron 

List of figures

M25Q128 - 3 V

Figure 49. Dual Command Page Program instruction sequence DSP, D2h . . . . . . . . . . . . . . . . . . . 117

Figure 50. Program OTP instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118

Figure 51. Subsector Erase instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119

Figure 52. Sector Erase instruction sequence DIO-SPI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119

Figure 53. Bulk Erase instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120

Figure 54. Program/Erase Suspend instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . 121

Figure 55. Program/Erase Resume instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . 121

Figure 56. Read Status Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122

Figure 57. Write Status Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122

Figure 58. Read Lock Register instruction and data-out sequence DIO-SPI. . . . . . . . . . . . . . . . . . . 123

Figure 59. Write to Lock Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . 124

Figure 60. Read Flag Status Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . 124

Figure 61. Clear Flag Status Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . 125

Figure 62. Read NV Configuration Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . 125

Figure 63. Write NV Configuration Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . 126

Figure 64. Read Volatile Configuration Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . 127

Figure 65. Write Volatile Configuration Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . 127

Figure 66. Read Volatile Enhanced Configuration Register instruction sequence DIO-SPI . . . . . . . 128

Figure 67. Write Volatile Enhanced Configuration Register instruction sequence DIO-SPI . . . . . . . 129

Figure 68. Multiple I/O Read Identification instruction and data-out sequence QIO-SPI . . . . . . . . . . 132

Figure 69. Quad Command Fast Read instruction and data-out sequence QSP, 0Bh . . . . . . . . . . . 133

Figure 70. Quad Command Fast Read instruction and data-out sequence QSP, 6Bh . . . . . . . . . . . 133

Figure 71. Quad Command Fast Read instruction and data-out sequence QSP, EBh . . . . . . . . . . . 134

Figure 72. Read OTP instruction and data-out sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . 135

Figure 73. Write Enable instruction sequence QIO-SPI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135

Figure 74. Write Disable instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136

Figure 75. Quad Command Page Program instruction sequence QIO-SPI, 02h. . . . . . . . . . . . . . . . 137

Figure 76. Quad Command Page Program instruction sequence QIO-SPI, 12h. . . . . . . . . . . . . . . . 137

Figure 77. Quad Command Page Program instruction sequence QIO-SPI, 32h. . . . . . . . . . . . . . . . 138

Figure 78. Program OTP instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139

Figure 79. Subsector Erase instruction sequence QIO-SPI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140

Figure 80. Sector Erase instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140

Figure 81. Bulk Erase instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141

Figure 82. Program/Erase Suspend instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . 142

Figure 83. Program/Erase Resume instruction sequence QIO-SPI. . . . . . . . . . . . . . . . . . . . . . . . . . 143

Figure 84. Read Status Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144

Figure 85. Write Status Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145

Figure 86. Read Lock Register instruction and data-out sequence QIO-SPI . . . . . . . . . . . . . . . . . . 146

Figure 87. Write to Lock Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . 147

Figure 88. Read Flag Status Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . 148

Figure 89. Clear Flag Status Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . 149

Figure 90. Read NV Configuration Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . 150

Figure 91. Write NV Configuration Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . 151

Figure 92. Read Volatile Configuration Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . 152

Figure 93. Write Volatile Configuration Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . 153

Figure 94. Read Volatile Enhanced Configuration Register instruction sequence QIO-SPI . . . . . . . 154

Figure 95. Write Volatile Enhanced Configuration Register instruction sequence QIO-SPI . . . . . . . 155

Figure 96. N25Q128 Read functionality Flow Chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157

Figure 97. XIP mode directly after power on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158

Figure 98. XiP: enter by VCR 2/2 (QIOFR in normal SPI protocol example) . . . . . . . . . . . . . . . . . . . 160

Figure 99. Power-up timing, Fast POR selected . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163

Figure 100. Power-up timing, Fast POR not selected . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163

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