BD82HM55-SLGZS Просмотр технического описания (PDF) - Intel

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BD82HM55-SLGZS

Intel® 5 Series Chipset and Intel® 3400 Series Chipset

Intel 

Intel® Management Engine Interface (MEI) Subsystem Registers (D22:F0)

23.10.9 KTMCR—KT Modem Control Register (KT—D23:F3)

Address Offset: 04h

Default Value: 00h

Attribute:

Size:

R/W

8 bits

The Modem Control Register controls the interface with the modem. Since the FW

emulates the modem, the Host communicates to the FW via this register. Register has

impact on hardware when the Loopback mode is on.

Bit

Description

7:5 Reserved

Loop Back Mode (LBM)—R/W. When set by the Host, this bit indicates that the

4

serial port is in loop Back mode. This means that the data that is transmitted by the

host should be received. Helps in debug of the interface.

Output 2 (OUT2)—R/W. This bit has no affect on hardware in normal mode. In loop

3

back mode the value of this bit is written by hardware to the Modem Status Register

bit 7.

Output 1 (OUT1)—R/W. This bit has no affect on hardware in normal mode. In loop

2

back mode the value of this bit is written by hardware to Modem Status Register bit

6.

Request to Send Out (RTSO)—R/W. This bit has no affect on hardware in normal

1

mode. In loopback mode, the value of this bit is written by hardware to Modem Status

Register bit 4.

Data Terminal Ready Out (DRTO)—R/W. This bit has no affect on hardware in

0

normal mode. In loopback mode, the value in this bit is written by hardware to

Modem Status Register Bit 5.

954

Datasheet

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